From 72d40647442b264f2a84f23715c0513297b7dd07 Mon Sep 17 00:00:00 2001 From: Evgenii Iarkov Date: Tue, 1 Feb 2022 21:41:20 +0200 Subject: [PATCH] stm32/g0: rcc: Correct RCC_CCIPR_TIM1SEL_SHIFT value (20 -> 22) Reviewed-by: Karl Palsson --- include/libopencm3/stm32/g0/rcc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/libopencm3/stm32/g0/rcc.h b/include/libopencm3/stm32/g0/rcc.h index dd3d4acf..3c5ad375 100644 --- a/include/libopencm3/stm32/g0/rcc.h +++ b/include/libopencm3/stm32/g0/rcc.h @@ -487,7 +487,7 @@ /**@}*/ #define RCC_CCIPR_TIM1SEL_MASK 0x1 -#define RCC_CCIPR_TIM1SEL_SHIFT 20 +#define RCC_CCIPR_TIM1SEL_SHIFT 22 /** @defgroup rcc_ccipr_tim1sel TIM1SEL @{*/ #define RCC_CCIPR_TIM1SEL_TIMPCLK 0