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Better method of reset and clock handling with RCC, support L1, F1, F2, F3, F4

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This commit is contained in:
BuFran
2013-07-02 20:04:51 +02:00
committed by Piotr Esden-Tempski
parent 33f75a529d
commit 723e1a69bd
19 changed files with 1211 additions and 242 deletions
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2
lib/stm32/f2/Makefile
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@@ -41,7 +41,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
spi_common_l1f124.o timer_common_all.o timer_common_f234.o \
timer_common_f24.o usart_common_all.o usart_common_f124.o \
flash_common_f234.o flash_common_f24.o hash_common_f24.o \
crypto_common_f24.o exti_common_all.o
crypto_common_f24.o exti_common_all.o rcc_common_all.o
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \
usb_f107.o usb_f207.o

42
lib/stm32/f2/rcc.c
View File

@@ -1,3 +1,21 @@
/** @defgroup rcc_file RCC
*
* @ingroup STM32F2xx
*
* @section rcc_f2_api_ex Reset and Clock Control API.
*
* @brief <b>libopencm3 STM32F4xx Reset and Clock Control</b>
*
* @author @htmlonly &copy; @endhtmlonly 2013 Frantisek Burian <BuFran at seznam.cz>
*
* @date 18 Jun 2013
*
* This library supports the Reset and Clock Control System in the STM32 series
* of ARM Cortex Microcontrollers by ST Microelectronics.
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
@@ -23,6 +41,8 @@
#include <libopencm3/stm32/f2/rcc.h>
#include <libopencm3/stm32/f2/flash.h>
/**@{*/
/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset. */
uint32_t rcc_ppre1_frequency = 16000000;
uint32_t rcc_ppre2_frequency = 16000000;
@@ -264,26 +284,6 @@ void rcc_osc_bypass_disable(osc_t osc)
}
}
void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en)
{
*reg |= en;
}
void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en)
{
*reg &= ~en;
}
void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset)
{
*reg |= reset;
}
void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset)
{
*reg &= ~clear_reset;
}
void rcc_set_sysclk_source(uint32_t clk)
{
uint32_t reg32;
@@ -413,3 +413,5 @@ void rcc_backupdomain_reset(void)
/* Clear the backup domain software reset. */
RCC_BDCR &= ~RCC_BDCR_BDRST;
}
/**@}*/