Better method of reset and clock handling with RCC, support L1, F1, F2, F3, F4
This commit is contained in:
BuFran
committed by
Piotr Esden-Tempski
Piotr Esden-Tempski
parent
33f75a529d
commit
723e1a69bd
185
lib/stm32/common/rcc_common_all.c
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185
lib/stm32/common/rcc_common_all.c
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Frantisek Burian <bufran@seznam.cz>
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* .. file is merged from many other copyrighted files of stm32 family
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <libopencm3/stm32/rcc.h>
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Enable Peripheral Clocks.
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*
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* Enable the clock on particular peripherals. There are three registers
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* involved, each one controlling the enabling of clocks associated with the
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* AHB, APB1 and APB2 respectively. Several peripherals could be enabled
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* simultaneously <em>only if they are controlled by the same register</em>.
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*
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* @param[in] *reg Unsigned int32. Pointer to a Clock Enable Register
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* (either RCC_AHBENR, RCC_APB1ENR or RCC_APB2ENR)
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*
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* @param[in] en Unsigned int32. Logical OR of all enables to be set
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* @li If register is RCC_AHBER, from @ref rcc_ahbenr_en
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* @li If register is RCC_APB1ENR, from @ref rcc_apb1enr_en
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* @li If register is RCC_APB2ENR, from @ref rcc_apb2enr_en
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*/
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void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en)
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{
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*reg |= en;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Disable Peripheral Clocks.
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*
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* Enable the clock on particular peripherals. There are three registers
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* involved, each one controlling the enabling of clocks associated with
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* the AHB, APB1 and APB2 respectively. Several peripherals could be disabled
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* simultaneously <em>only if they are controlled by the same register</em>.
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*
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* @param[in] *reg Unsigned int32. Pointer to a Clock Enable Register
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* (either RCC_AHBENR, RCC_APB1ENR or RCC_APB2ENR)
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* @param[in] en Unsigned int32. Logical OR of all enables to be used for
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* disabling.
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* @li If register is RCC_AHBER, from @ref rcc_ahbenr_en
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* @li If register is RCC_APB1ENR, from @ref rcc_apb1enr_en
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* @li If register is RCC_APB2ENR, from @ref rcc_apb2enr_en
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*/
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void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en)
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{
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*reg &= ~en;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Reset Peripherals.
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*
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* Reset particular peripherals. There are three registers involved, each one
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* controlling reset of peripherals associated with the AHB, APB1 and APB2
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* respectively. Several peripherals could be reset simultaneously <em>only if
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* they are controlled by the same register</em>.
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*
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* @param[in] *reg Unsigned int32. Pointer to a Reset Register
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* (either RCC_AHBENR, RCC_APB1ENR or RCC_APB2ENR)
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* @param[in] reset Unsigned int32. Logical OR of all resets.
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* @li If register is RCC_AHBRSTR, from @ref rcc_ahbrstr_rst
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* @li If register is RCC_APB1RSTR, from @ref rcc_apb1rstr_rst
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* @li If register is RCC_APB2RSTR, from @ref rcc_apb2rstr_rst
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*/
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void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset)
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{
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*reg |= reset;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief RCC Remove Reset on Peripherals.
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*
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* Remove the reset on particular peripherals. There are three registers
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* involved, each one controlling reset of peripherals associated with the AHB,
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* APB1 and APB2 respectively. Several peripherals could have the reset removed
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* simultaneously <em>only if they are controlled by the same register</em>.
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*
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* @param[in] *reg Unsigned int32. Pointer to a Reset Register
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* (either RCC_AHBENR, RCC_APB1ENR or RCC_APB2ENR)
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* @param[in] clear_reset Unsigned int32. Logical OR of all resets to be removed:
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* @li If register is RCC_AHBRSTR, from @ref rcc_ahbrstr_rst
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* @li If register is RCC_APB1RSTR, from @ref rcc_apb1rstr_rst
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* @li If register is RCC_APB2RSTR, from @ref rcc_apb2rstr_rst
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*/
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void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset)
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{
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*reg &= ~clear_reset;
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}
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#define _RCC_REG(i) MMIO32(RCC_BASE + ((i) >> 5))
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#define _RCC_BIT(i) (1 << ((i) & 0x1f))
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/*---------------------------------------------------------------------------*/
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/** @brief Enable Peripheral Clock in running mode.
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*
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* Enable the clock on particular peripheral.
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*
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* @param[in] periph periph_t Peripheral Name
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*
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* For available constants, see #periph_t (RCC_UART1 for example)
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*/
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void rcc_periph_clock_enable(enum rcc_periph_clken clken)
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{
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_RCC_REG(clken) |= _RCC_BIT(clken);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Disable Peripheral Clock in running mode.
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* Disable the clock on particular peripheral.
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*
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* @param[in] periph periph_t Peripheral Name
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*
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* For available constants, see #periph_t (RCC_UART1 for example)
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*/
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void rcc_periph_clock_disable(enum rcc_periph_clken clken)
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{
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_RCC_REG(clken) &= ~_RCC_BIT(clken);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Reset Peripheral, pulsed
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*
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* Reset particular peripheral, and restore to working state.
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*
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* @param[in] periph periph_t Peripheral name
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*
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* For available constants, see #periph_t (RCC_UART1 for example)
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*/
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void rcc_periph_reset_pulse(enum rcc_periph_rst rst)
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{
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_RCC_REG(rst) |= _RCC_BIT(rst);
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_RCC_REG(rst) &= ~_RCC_BIT(rst);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Reset Peripheral, hold
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*
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* Reset particular peripheral, and hold in reset state.
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*
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* @param[in] periph periph_t Peripheral name
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*
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* For available constants, see #periph_t (RCC_UART1 for example)
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*/
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void rcc_periph_reset_hold(enum rcc_periph_rst rst)
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{
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_RCC_REG(rst) |= _RCC_BIT(rst);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Reset Peripheral, release
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*
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* Restore peripheral from reset state to working state.
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*
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* @param[in] periph periph_t Peripheral name
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*
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* For available constants, see #periph_t (RCC_UART1 for example)
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*/
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void rcc_periph_reset_release(enum rcc_periph_rst rst)
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{
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_RCC_REG(rst) &= ~_RCC_BIT(rst);
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}
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#undef _RCC_REG
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#undef _RCC_BIT
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