[STM32F3] Split timer common f24 into f234 and f24.

This commit is contained in:
Piotr Esden-Tempski
2013-07-04 19:03:43 -07:00
parent 201c2706b5
commit 7085867db6
5 changed files with 66 additions and 36 deletions

View File

@@ -37,7 +37,6 @@ and similarly for TIM5 for oscillator calibration purposes.
@ref tim5_opt_trigger_remap.
*/
#if !defined(STM32F3)
void timer_set_option(uint32_t timer_peripheral, uint32_t option)
{
if (timer_peripheral == TIM2) {
@@ -48,35 +47,7 @@ void timer_set_option(uint32_t timer_peripheral, uint32_t option)
TIM_OR(timer_peripheral) |= option;
}
}
#endif
/*---------------------------------------------------------------------------*/
/** @brief Set Input Polarity
The timer channel must be set to input capture mode.
@param[in] timer_peripheral Unsigned int32. Timer register address base
@param[in] ic ::tim_ic_id. Input Capture channel designator.
@param[in] pol ::tim_ic_pol. Input Capture polarity control.
*/
void timer_ic_set_polarity(uint32_t timer_peripheral, enum tim_ic_id ic,
enum tim_ic_pol pol)
{
/* Clear CCxP and CCxNP to zero. For both edge trigger both fields are
* set. Case 10 is invalid.
*/
TIM_CCER(timer_peripheral) &= ~(0x6 << (ic * 4));
switch (pol) {
case TIM_IC_RISING: /* 00 */
break;
case TIM_IC_BOTH: /* 11 */
TIM_CCER(timer_peripheral) |= (0x6 << (ic * 4));
break;
case TIM_IC_FALLING: /* 01 */
TIM_CCER(timer_peripheral) |= (0x2 << (ic * 4));
}
}
/**@}*/