EMTime/libopencm3
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge pull request #84 "Pr flash reg rename"

Browse Source 
Merge remote-tracking branch 'karlp/pr_flash-reg-rename'

Conflicts:
	include/libopencm3/stm32/l1/flash.h
This commit is contained in:
Piotr Esden-Tempski
2013-02-18 14:09:31 -08:00
parent f980f197ca 40d9d630f0
commit 6eef01ce26
12 changed files with 312 additions and 311 deletions
Download Patch File Download Diff File Expand all files Collapse all files

56
include/libopencm3/stm32/f1/flash.h
View File

@@ -44,48 +44,48 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_PRFTBS (1 << 5)
#define FLASH_PRFTBE (1 << 4)
#define FLASH_HLFCYA (1 << 3)
#define FLASH_LATENCY_0WS 0x00
#define FLASH_LATENCY_1WS 0x01
#define FLASH_LATENCY_2WS 0x02
#define FLASH_ACR_PRFTBS (1 << 5)
#define FLASH_ACR_PRFTBE (1 << 4)
#define FLASH_ACR_HLFCYA (1 << 3)
#define FLASH_ACR_LATENCY_0WS 0x00
#define FLASH_ACR_LATENCY_1WS 0x01
#define FLASH_ACR_LATENCY_2WS 0x02
/* --- FLASH_SR values ----------------------------------------------------- */
#define FLASH_EOP (1 << 5)
#define FLASH_WRPRTERR (1 << 4)
#define FLASH_PGERR (1 << 2)
#define FLASH_BSY (1 << 0)
#define FLASH_SR_EOP (1 << 5)
#define FLASH_SR_WRPRTERR (1 << 4)
#define FLASH_SR_PGERR (1 << 2)
#define FLASH_SR_BSY (1 << 0)
/* --- FLASH_CR values ----------------------------------------------------- */
#define FLASH_EOPIE (1 << 12)
#define FLASH_ERRIE (1 << 10)
#define FLASH_OPTWRE (1 << 9)
#define FLASH_LOCK (1 << 7)
#define FLASH_STRT (1 << 6)
#define FLASH_OPTER (1 << 5)
#define FLASH_OPTPG (1 << 4)
#define FLASH_MER (1 << 2)
#define FLASH_PER (1 << 1)
#define FLASH_PG (1 << 0)
#define FLASH_CR_EOPIE (1 << 12)
#define FLASH_CR_ERRIE (1 << 10)
#define FLASH_CR_OPTWRE (1 << 9)
#define FLASH_CR_LOCK (1 << 7)
#define FLASH_CR_STRT (1 << 6)
#define FLASH_CR_OPTER (1 << 5)
#define FLASH_CR_OPTPG (1 << 4)
#define FLASH_CR_MER (1 << 2)
#define FLASH_CR_PER (1 << 1)
#define FLASH_CR_PG (1 << 0)
/* --- FLASH_OBR values ---------------------------------------------------- */
/* FLASH_OBR[25:18]: Data1 */
/* FLASH_OBR[17:10]: Data0 */
#define FLASH_NRST_STDBY (1 << 4)
#define FLASH_NRST_STOP (1 << 3)
#define FLASH_WDG_SW (1 << 2)
#define FLASH_RDPRT (1 << 1)
#define FLASH_OPTERR (1 << 0)
#define FLASH_OBR_NRST_STDBY (1 << 4)
#define FLASH_OBR_NRST_STOP (1 << 3)
#define FLASH_OBR_WDG_SW (1 << 2)
#define FLASH_OBR_RDPRT (1 << 1)
#define FLASH_OBR_OPTERR (1 << 0)
/* --- FLASH Keys -----------------------------------------------------------*/
#define RDP_KEY ((u16)0x00a5)
#define FLASH_KEY1 ((u32)0x45670123)
#define FLASH_KEY2 ((u32)0xcdef89ab)
#define FLASH_RDP_KEY ((u16)0x00a5)
#define FLASH_KEYR_KEY1 ((u32)0x45670123)
#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
/* --- Function prototypes ------------------------------------------------- */

112
include/libopencm3/stm32/f2/flash.h
View File

@@ -43,76 +43,76 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_DCRST (1 << 12)
#define FLASH_ICRST (1 << 11)
#define FLASH_DCE (1 << 10)
#define FLASH_ICE (1 << 9)
#define FLASH_PRFTEN (1 << 8)
#define FLASH_LATENCY_0WS 0x00
#define FLASH_LATENCY_1WS 0x01
#define FLASH_LATENCY_2WS 0x02
#define FLASH_LATENCY_3WS 0x03
#define FLASH_LATENCY_4WS 0x04
#define FLASH_LATENCY_5WS 0x05
#define FLASH_LATENCY_6WS 0x06
#define FLASH_LATENCY_7WS 0x07
#define FLASH_ACR_DCRST (1 << 12)
#define FLASH_ACR_ICRST (1 << 11)
#define FLASH_ACR_DCE (1 << 10)
#define FLASH_ACR_ICE (1 << 9)
#define FLASH_ACR_PRFTEN (1 << 8)
#define FLASH_ACR_LATENCY_0WS 0x00
#define FLASH_ACR_LATENCY_1WS 0x01
#define FLASH_ACR_LATENCY_2WS 0x02
#define FLASH_ACR_LATENCY_3WS 0x03
#define FLASH_ACR_LATENCY_4WS 0x04
#define FLASH_ACR_LATENCY_5WS 0x05
#define FLASH_ACR_LATENCY_6WS 0x06
#define FLASH_ACR_LATENCY_7WS 0x07
/* --- FLASH_SR values ----------------------------------------------------- */
#define FLASH_BSY (1 << 16)
#define FLASH_PGSERR (1 << 7)
#define FLASH_PGPERR (1 << 6)
#define FLASH_PGAERR (1 << 5)
#define FLASH_WRPERR (1 << 4)
#define FLASH_OPERR (1 << 1)
#define FLASH_EOP (1 << 0)
#define FLASH_SR_BSY (1 << 16)
#define FLASH_SR_PGSERR (1 << 7)
#define FLASH_SR_PGPERR (1 << 6)
#define FLASH_SR_PGAERR (1 << 5)
#define FLASH_SR_WRPERR (1 << 4)
#define FLASH_SR_OPERR (1 << 1)
#define FLASH_SR_EOP (1 << 0)
/* --- FLASH_CR values ----------------------------------------------------- */
#define FLASH_LOCK (1 << 31)
#define FLASH_ERRIE (1 << 25)
#define FLASH_EOPIE (1 << 24)
#define FLASH_STRT (1 << 16)
#define FLASH_MER (1 << 2)
#define FLASH_SER (1 << 1)
#define FLASH_PG (1 << 0)
#define FLASH_SECTOR_0 (0x00 << 3)
#define FLASH_SECTOR_1 (0x01 << 3)
#define FLASH_SECTOR_2 (0x02 << 3)
#define FLASH_SECTOR_3 (0x03 << 3)
#define FLASH_SECTOR_4 (0x04 << 3)
#define FLASH_SECTOR_5 (0x05 << 3)
#define FLASH_SECTOR_6 (0x06 << 3)
#define FLASH_SECTOR_7 (0x07 << 3)
#define FLASH_SECTOR_8 (0x08 << 3)
#define FLASH_SECTOR_9 (0x09 << 3)
#define FLASH_SECTOR_10 (0x0a << 3)
#define FLASH_SECTOR_11 (0x0b << 3)
#define FLASH_PROGRAM_X8 (0x00 << 8)
#define FLASH_PROGRAM_X16 (0x01 << 8)
#define FLASH_PROGRAM_X32 (0x02 << 8)
#define FLASH_PROGRAM_X64 (0x03 << 8)
#define FLASH_CR_LOCK (1 << 31)
#define FLASH_CR_ERRIE (1 << 25)
#define FLASH_CR_EOPIE (1 << 24)
#define FLASH_CR_STRT (1 << 16)
#define FLASH_CR_MER (1 << 2)
#define FLASH_CR_SER (1 << 1)
#define FLASH_CR_PG (1 << 0)
#define FLASH_CR_SECTOR_0 (0x00 << 3)
#define FLASH_CR_SECTOR_1 (0x01 << 3)
#define FLASH_CR_SECTOR_2 (0x02 << 3)
#define FLASH_CR_SECTOR_3 (0x03 << 3)
#define FLASH_CR_SECTOR_4 (0x04 << 3)
#define FLASH_CR_SECTOR_5 (0x05 << 3)
#define FLASH_CR_SECTOR_6 (0x06 << 3)
#define FLASH_CR_SECTOR_7 (0x07 << 3)
#define FLASH_CR_SECTOR_8 (0x08 << 3)
#define FLASH_CR_SECTOR_9 (0x09 << 3)
#define FLASH_CR_SECTOR_10 (0x0a << 3)
#define FLASH_CR_SECTOR_11 (0x0b << 3)
#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
/* --- FLASH_OPTCR values -------------------------------------------------- */
/* FLASH_OPTCR[27:16]: nWRP */
/* FLASH_OBR[15:8]: RDP */
#define FLASH_NRST_STDBY (1 << 7)
#define FLASH_NRST_STOP (1 << 6)
#define FLASH_WDG_SW (1 << 5)
#define FLASH_OPTSTRT (1 << 1)
#define FLASH_OPTLOCK (1 << 0)
#define FLASH_BOR_LEVEL_3 (0x00 << 2)
#define FLASH_BOR_LEVEL_2 (0x01 << 2)
#define FLASH_BOR_LEVEL_1 (0x02 << 2)
#define FLASH_BOR_OFF (0x03 << 2)
#define FLASH_OPTCR_NRST_STDBY (1 << 7)
#define FLASH_OPTCR_NRST_STOP (1 << 6)
#define FLASH_OPTCR_WDG_SW (1 << 5)
#define FLASH_OPTCR_OPTSTRT (1 << 1)
#define FLASH_OPTCR_OPTLOCK (1 << 0)
#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
/* --- FLASH Keys -----------------------------------------------------------*/
#define FLASH_KEY1 ((u32)0x45670123)
#define FLASH_KEY2 ((u32)0xcdef89ab)
#define FLASH_OPTKEY1 ((u32)0x08192a3b)
#define FLASH_OPTKEY2 ((u32)0x4c5d6e7f)
#define FLASH_KEYR_KEY1 ((u32)0x45670123)
#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
#define FLASH_OPTKEYR_KEY1 ((u32)0x08192a3b)
#define FLASH_OPTKEYR_KEY2 ((u32)0x4c5d6e7f)
/* --- Function prototypes ------------------------------------------------- */

112
include/libopencm3/stm32/f4/flash.h
View File

@@ -42,76 +42,76 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_DCRST (1 << 12)
#define FLASH_ICRST (1 << 11)
#define FLASH_DCE (1 << 10)
#define FLASH_ICE (1 << 9)
#define FLASH_PRFTEN (1 << 8)
#define FLASH_LATENCY_0WS 0x00
#define FLASH_LATENCY_1WS 0x01
#define FLASH_LATENCY_2WS 0x02
#define FLASH_LATENCY_3WS 0x03
#define FLASH_LATENCY_4WS 0x04
#define FLASH_LATENCY_5WS 0x05
#define FLASH_LATENCY_6WS 0x06
#define FLASH_LATENCY_7WS 0x07
#define FLASH_ACR_DCRST (1 << 12)
#define FLASH_ACR_ICRST (1 << 11)
#define FLASH_ACR_DCE (1 << 10)
#define FLASH_ACR_ICE (1 << 9)
#define FLASH_ACR_PRFTEN (1 << 8)
#define FLASH_ACR_LATENCY_0WS 0x00
#define FLASH_ACR_LATENCY_1WS 0x01
#define FLASH_ACR_LATENCY_2WS 0x02
#define FLASH_ACR_LATENCY_3WS 0x03
#define FLASH_ACR_LATENCY_4WS 0x04
#define FLASH_ACR_LATENCY_5WS 0x05
#define FLASH_ACR_LATENCY_6WS 0x06
#define FLASH_ACR_LATENCY_7WS 0x07
/* --- FLASH_SR values ----------------------------------------------------- */
#define FLASH_BSY (1 << 16)
#define FLASH_PGSERR (1 << 7)
#define FLASH_PGPERR (1 << 6)
#define FLASH_PGAERR (1 << 5)
#define FLASH_WRPERR (1 << 4)
#define FLASH_OPERR (1 << 1)
#define FLASH_EOP (1 << 0)
#define FLASH_SR_BSY (1 << 16)
#define FLASH_SR_PGSERR (1 << 7)
#define FLASH_SR_PGPERR (1 << 6)
#define FLASH_SR_PGAERR (1 << 5)
#define FLASH_SR_WRPERR (1 << 4)
#define FLASH_SR_OPERR (1 << 1)
#define FLASH_SR_EOP (1 << 0)
/* --- FLASH_CR values ----------------------------------------------------- */
#define FLASH_LOCK (1 << 31)
#define FLASH_ERRIE (1 << 25)
#define FLASH_EOPIE (1 << 24)
#define FLASH_STRT (1 << 16)
#define FLASH_MER (1 << 2)
#define FLASH_SER (1 << 1)
#define FLASH_PG (1 << 0)
#define FLASH_SECTOR_0 (0x00 << 3)
#define FLASH_SECTOR_1 (0x01 << 3)
#define FLASH_SECTOR_2 (0x02 << 3)
#define FLASH_SECTOR_3 (0x03 << 3)
#define FLASH_SECTOR_4 (0x04 << 3)
#define FLASH_SECTOR_5 (0x05 << 3)
#define FLASH_SECTOR_6 (0x06 << 3)
#define FLASH_SECTOR_7 (0x07 << 3)
#define FLASH_SECTOR_8 (0x08 << 3)
#define FLASH_SECTOR_9 (0x09 << 3)
#define FLASH_SECTOR_10 (0x0a << 3)
#define FLASH_SECTOR_11 (0x0b << 3)
#define FLASH_PROGRAM_X8 (0x00 << 8)
#define FLASH_PROGRAM_X16 (0x01 << 8)
#define FLASH_PROGRAM_X32 (0x02 << 8)
#define FLASH_PROGRAM_X64 (0x03 << 8)
#define FLASH_CR_LOCK (1 << 31)
#define FLASH_CR_ERRIE (1 << 25)
#define FLASH_CR_EOPIE (1 << 24)
#define FLASH_CR_STRT (1 << 16)
#define FLASH_CR_MER (1 << 2)
#define FLASH_CR_SER (1 << 1)
#define FLASH_CR_PG (1 << 0)
#define FLASH_CR_SECTOR_0 (0x00 << 3)
#define FLASH_CR_SECTOR_1 (0x01 << 3)
#define FLASH_CR_SECTOR_2 (0x02 << 3)
#define FLASH_CR_SECTOR_3 (0x03 << 3)
#define FLASH_CR_SECTOR_4 (0x04 << 3)
#define FLASH_CR_SECTOR_5 (0x05 << 3)
#define FLASH_CR_SECTOR_6 (0x06 << 3)
#define FLASH_CR_SECTOR_7 (0x07 << 3)
#define FLASH_CR_SECTOR_8 (0x08 << 3)
#define FLASH_CR_SECTOR_9 (0x09 << 3)
#define FLASH_CR_SECTOR_10 (0x0a << 3)
#define FLASH_CR_SECTOR_11 (0x0b << 3)
#define FLASH_CR_PROGRAM_X8 (0x00 << 8)
#define FLASH_CR_PROGRAM_X16 (0x01 << 8)
#define FLASH_CR_PROGRAM_X32 (0x02 << 8)
#define FLASH_CR_PROGRAM_X64 (0x03 << 8)
/* --- FLASH_OPTCR values -------------------------------------------------- */
/* FLASH_OPTCR[27:16]: nWRP */
/* FLASH_OBR[15:8]: RDP */
#define FLASH_NRST_STDBY (1 << 7)
#define FLASH_NRST_STOP (1 << 6)
#define FLASH_WDG_SW (1 << 5)
#define FLASH_OPTSTRT (1 << 1)
#define FLASH_OPTLOCK (1 << 0)
#define FLASH_BOR_LEVEL_3 (0x00 << 2)
#define FLASH_BOR_LEVEL_2 (0x01 << 2)
#define FLASH_BOR_LEVEL_1 (0x02 << 2)
#define FLASH_BOR_OFF (0x03 << 2)
#define FLASH_OPTCR_NRST_STDBY (1 << 7)
#define FLASH_OPTCR_NRST_STOP (1 << 6)
#define FLASH_OPTCR_WDG_SW (1 << 5)
#define FLASH_OPTCR_OPTSTRT (1 << 1)
#define FLASH_OPTCR_OPTLOCK (1 << 0)
#define FLASH_OPTCR_BOR_LEVEL_3 (0x00 << 2)
#define FLASH_OPTCR_BOR_LEVEL_2 (0x01 << 2)
#define FLASH_OPTCR_BOR_LEVEL_1 (0x02 << 2)
#define FLASH_OPTCR_BOR_OFF (0x03 << 2)
/* --- FLASH Keys -----------------------------------------------------------*/
#define FLASH_KEY1 ((u32)0x45670123)
#define FLASH_KEY2 ((u32)0xcdef89ab)
#define FLASH_OPTKEY1 ((u32)0x08192a3b)
#define FLASH_OPTKEY2 ((u32)0x4c5d6e7f)
#define FLASH_KEYR_KEY1 ((u32)0x45670123)
#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab)
#define FLASH_OPTKEYR_KEY1 ((u32)0x08192a3b)
#define FLASH_OPTKEYR_KEY2 ((u32)0x4c5d6e7f)
/* --- Function prototypes ------------------------------------------------- */

98
include/libopencm3/stm32/l1/flash.h
View File

@@ -45,70 +45,70 @@
/* --- FLASH_ACR values ---------------------------------------------------- */
#define FLASH_RUNPD (1 << 4)
#define FLASH_SLEEPPD (1 << 3)
#define FLASH_ACC64 (1 << 2)
#define FLASH_PRFTEN (1 << 1)
#define FLASH_LATENCY_0WS 0x00
#define FLASH_LATENCY_1WS 0x01
#define FLASH_ACR_RUNPD (1 << 4)
#define FLASH_ACR_SLEEPPD (1 << 3)
#define FLASH_ACR_ACC64 (1 << 2)
#define FLASH_ACR_PRFTEN (1 << 1)
#define FLASH_ACR_LATENCY_0WS 0x00
#define FLASH_ACR_LATENCY_1WS 0x01
/* --- FLASH_PECR values. Program/erase control register */
#define FLASH_OBL_LAUNCH (1 << 18)
#define FLASH_ERRIE (1 << 17)
#define FLASH_EOPIE (1 << 16)
#define FLASH_PARALLBANK (1 << 15)
#define FLASH_FPRG (1 << 10)
#define FLASH_ERASE (1 << 9)
#define FLASH_FTDW (1 << 8)
#define FLASH_FTDW (1 << 8)
#define FLASH_DATA (1 << 4)
#define FLASH_PROG (1 << 3)
#define FLASH_OPTLOCK (1 << 2)
#define FLASH_PRGLOCK (1 << 1)
#define FLASH_PELOCK (1 << 0)
#define FLASH_PECR_OBL_LAUNCH (1 << 18)
#define FLASH_PECR_ERRIE (1 << 17)
#define FLASH_PECR_EOPIE (1 << 16)
#define FLASH_PECR_PARALLBANK (1 << 15)
#define FLASH_PECR_FPRG (1 << 10)
#define FLASH_PECR_ERASE (1 << 9)
#define FLASH_PECR_FTDW (1 << 8)
#define FLASH_PECR_FTDW (1 << 8)
#define FLASH_PECR_DATA (1 << 4)
#define FLASH_PECR_PROG (1 << 3)
#define FLASH_PECR_OPTLOCK (1 << 2)
#define FLASH_PECR_PRGLOCK (1 << 1)
#define FLASH_PECR_PELOCK (1 << 0)
/* Power down key register (FLASH_PDKEYR) */
#define FLASH_PDKEY1 ((u32)0x04152637)
#define FLASH_PDKEY2 ((u32)0xFAFBFCFD)
#define FLASH_PDKEYR_PDKEY1 ((u32)0x04152637)
#define FLASH_PDKEYR_PDKEY2 ((u32)0xFAFBFCFD)
/* Program/erase key register (FLASH_PEKEYR) */
#define FLASH_PEKEY1 ((u32)0x89ABCDEF)
#define FLASH_PEKEY2 ((u32)0x02030405)
#define FLASH_PEKEYR_PEKEY1 ((u32)0x89ABCDEF)
#define FLASH_PEKEYR_PEKEY2 ((u32)0x02030405)
/* Program memory key register (FLASH_PRGKEYR) */
#define FLASH_PRGKEY1 ((u32)0x8C9DAEBF)
#define FLASH_PRGKEY2 ((u32)0x13141516)
#define FLASH_PRGKEYR_PRGKEY1 ((u32)0x8C9DAEBF)
#define FLASH_PRGKEYR_PRGKEY2 ((u32)0x13141516)
/* Option byte key register (FLASH_OPTKEYR) */
#define FLASH_OPTKEY1 ((u32)0xFBEAD9C8)
#define FLASH_OPTKEY2 ((u32)0x24252627)
#define FLASH_OPTKEYR_OPTKEY1 ((u32)0xFBEAD9C8)
#define FLASH_OPTKEYR_OPTKEY2 ((u32)0x24252627)
/* --- FLASH_SR values ----------------------------------------------------- */
#define FLASH_OPTVERRUSR (1 << 12)
#define FLASH_OPTVERR (1 << 11)
#define FLASH_SIZEERR (1 << 10)
#define FLASH_PGAERR (1 << 9)
#define FLASH_WRPERR (1 << 8)
#define FLASH_READY (1 << 3)
#define FLASH_ENDHV (1 << 2)
#define FLASH_EOP (1 << 1)
#define FLASH_BSY (1 << 0)
#define FLASH_SR_OPTVERRUSR (1 << 12)
#define FLASH_SR_OPTVERR (1 << 11)
#define FLASH_SR_SIZEERR (1 << 10)
#define FLASH_SR_PGAERR (1 << 9)
#define FLASH_SR_WRPERR (1 << 8)
#define FLASH_SR_READY (1 << 3)
#define FLASH_SR_ENDHV (1 << 2)
#define FLASH_SR_EOP (1 << 1)
#define FLASH_SR_BSY (1 << 0)
/* --- FLASH_OBR values ----------------------------------------------------- */
#define FLASH_BFB2 (1 << 23)
#define FLASH_NRST_STDBY (1 << 22)
#define FLASH_NRST_STOP (1 << 21)
#define FLASH_IWDG_SW (1 << 20)
#define FLASH_BOR_OFF (0x0 << 16)
#define FLASH_BOR_LEVEL_1 (0x8 << 16)
#define FLASH_BOR_LEVEL_2 (0x9 << 16)
#define FLASH_BOR_LEVEL_3 (0xa << 16)
#define FLASH_BOR_LEVEL_4 (0xb << 16)
#define FLASH_BOR_LEVEL_5 (0xc << 16)
#define FLASH_RDPRT_LEVEL_0 (0xaa)
#define FLASH_RDPRT_LEVEL_1 (0x00)
#define FLASH_RDPRT_LEVEL_2 (0xcc)
#define FLASH_OBR_BFB2 (1 << 23)
#define FLASH_OBR_NRST_STDBY (1 << 22)
#define FLASH_OBR_NRST_STOP (1 << 21)
#define FLASH_OBR_IWDG_SW (1 << 20)
#define FLASH_OBR_BOR_OFF (0x0 << 16)
#define FLASH_OBR_BOR_LEVEL_1 (0x8 << 16)
#define FLASH_OBR_BOR_LEVEL_2 (0x9 << 16)
#define FLASH_OBR_BOR_LEVEL_3 (0xa << 16)
#define FLASH_OBR_BOR_LEVEL_4 (0xb << 16)
#define FLASH_OBR_BOR_LEVEL_5 (0xc << 16)
#define FLASH_OBR_RDPRT_LEVEL_0 (0xaa)
#define FLASH_OBR_RDPRT_LEVEL_1 (0x00)
#define FLASH_OBR_RDPRT_LEVEL_2 (0xcc)
/* --- Function prototypes ------------------------------------------------- */