EMTime/libopencm3
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Various cosmetic and coding style fixes.

Browse Source
This commit is contained in:
Uwe Hermann
2010-06-29 23:01:44 +02:00
parent 47b31246ca
commit 6ba179b361
5 changed files with 125 additions and 116 deletions
Download Patch File Download Diff File Expand all files Collapse all files

195
lib/exti.c
View File

@@ -22,110 +22,119 @@
void exti_set_trigger(u32 extis, exti_trigger_type trig)
{
switch(trig)
{
case EXTI_TRIGGER_RISING:
EXTI_RTSR |= extis;
EXTI_FTSR &= ~extis;
break;
case EXTI_TRIGGER_FALLING:
EXTI_RTSR &= ~extis;
EXTI_FTSR |= extis;
break;
case EXTI_TRIGGER_BOTH:
EXTI_RTSR |= extis;
EXTI_FTSR |= extis;
break;
}
switch (trig) {
case EXTI_TRIGGER_RISING:
EXTI_RTSR |= extis;
EXTI_FTSR &= ~extis;
break;
case EXTI_TRIGGER_FALLING:
EXTI_RTSR &= ~extis;
EXTI_FTSR |= extis;
break;
case EXTI_TRIGGER_BOTH:
EXTI_RTSR |= extis;
EXTI_FTSR |= extis;
break;
}
}
void exti_enable_request(u32 extis)
{
//enable interrupts
EXTI_IMR |= extis;
//enable events
EXTI_EMR |= extis;
/* Enable interrupts. */
EXTI_IMR |= extis;
/* Enable events. */
EXTI_EMR |= extis;
}
void exti_disable_request(u32 extis)
{
//disable interrupts
EXTI_IMR &= ~extis;
//disable events
EXTI_EMR &= ~extis;
}
/* Disable interrupts. */
EXTI_IMR &= ~extis;
/*
Reset the interrupt request by writing a 1 to the corresponding
pending bit register
*/
void exti_reset_request(u32 extis)
{
EXTI_PR |= extis;
/* Disable events. */
EXTI_EMR &= ~extis;
}
/*
* Reset the interrupt request by writing a 1 to the corresponding
* pending bit register.
*/
void exti_reset_request(u32 extis)
{
EXTI_PR |= extis;
}
/*Remap an external interrupt line to the corresponding
pin on the specified GPIO port TODO: this could be rewritten in less lines of code */
/*
* Remap an external interrupt line to the corresponding pin on the
* specified GPIO port.
*
* TODO: This could be rewritten in less lines of code.
*/
void exti_select_source(u32 exti, u32 gpioport)
{
u8 shift =0;
u8 bits = 0;
switch (exti)
{
case EXTI0:
case EXTI4:
case EXTI8:
case EXTI12:
shift = 0;
break;
case EXTI1:
case EXTI5:
case EXTI9:
case EXTI13:
shift = 4;
break;
case EXTI2:
case EXTI6:
case EXTI10:
case EXTI14:
shift = 8;
break;
case EXTI3:
case EXTI7:
case EXTI11:
case EXTI15:
shift = 12;
break;
}
switch (gpioport)
{
case GPIOA:
bits = 0xF;
break;
case GPIOB:
bits = 0xE;
break;
case GPIOC:
bits = 0xD;
break;
case GPIOD:
bits = 0xC;
break;
case GPIOE:
bits = 0xB;
break;
case GPIOF:
bits = 0xA;
break;
case GPIOG:
bits = 0x9;
break;
}
if(exti < EXTI4) AFIO_EXTICR1 &=~ ( bits << shift );
else if (exti < EXTI8) AFIO_EXTICR2 &=~ ( bits << shift );
else if (exti < EXTI12) AFIO_EXTICR3 &=~ ( bits << shift );
else if (exti < EXTI16) AFIO_EXTICR4 &=~ ( bits << shift ); //ensure that only valid EXTI lines are used
}
u8 shift, bits;
shift = bits = 0;
switch (exti) {
case EXTI0:
case EXTI4:
case EXTI8:
case EXTI12:
shift = 0;
break;
case EXTI1:
case EXTI5:
case EXTI9:
case EXTI13:
shift = 4;
break;
case EXTI2:
case EXTI6:
case EXTI10:
case EXTI14:
shift = 8;
break;
case EXTI3:
case EXTI7:
case EXTI11:
case EXTI15:
shift = 12;
break;
}
switch (gpioport) {
case GPIOA:
bits = 0xf;
break;
case GPIOB:
bits = 0xe;
break;
case GPIOC:
bits = 0xd;
break;
case GPIOD:
bits = 0xc;
break;
case GPIOE:
bits = 0xb;
break;
case GPIOF:
bits = 0xa;
break;
case GPIOG:
bits = 0x9;
break;
}
/* Ensure that only valid EXTI lines are used. */
if (exti < EXTI4)
AFIO_EXTICR1 &= ~(bits << shift);
else if (exti < EXTI8)
AFIO_EXTICR2 &= ~(bits << shift);
else if (exti < EXTI12)
AFIO_EXTICR3 &= ~(bits << shift);
else if (exti < EXTI16)
AFIO_EXTICR4 &= ~(bits << shift);
}