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usb/dwc: Corrected how interrupts are handled for the H7's DWC2 so that setup and out packets are properly acknowledged

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dragonmux
2024-04-18 17:24:53 +01:00
committed by Piotr Esden-Tempski
parent 5e6c423100
commit 6b4592c82d
1 changed files with 21 additions and 12 deletions
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23
lib/usb/usb_dwc_common.c
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@@ -365,34 +365,43 @@ void dwc_poll(usbd_device *usbd_dev)
} }
/* /*
* There is no global interrupt flag for transmit complete. * There is not always a global interrupt flag for transmit complete.
* The XFRC bit must be checked in each OTG_DIEPINT(x). * The XFRC bit must be checked in each OTG_DIEPINT(x).
* *
* Iterate over the IN endpoints, triggering any post-transmit actions. * Iterate over the IN endpoints, triggering any post-transmit actions.
*/ */
#if defined(STM32H7)
if (intsts & OTG_GINTSTS_IEPINT) {
#endif
for (size_t i = 0; i < ENDPOINT_COUNT; i++) { for (size_t i = 0; i < ENDPOINT_COUNT; i++) {
if (REBASE(OTG_DIEPINT(i)) & OTG_DIEPINTX_XFRC) { if (REBASE(OTG_DIEPINT(i)) & OTG_DIEPINTX_XFRC) {
/* Transfer complete. */ /* Transfer complete. */
REBASE(OTG_DIEPINT(i)) = OTG_DIEPINTX_XFRC;
if (usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN]) { if (usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN]) {
usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN](usbd_dev, i); usbd_dev->user_callback_ctr[i][USB_TRANSACTION_IN](usbd_dev, i);
} }
REBASE(OTG_DIEPINT(i)) = OTG_DIEPINTX_XFRC;
} }
} }
#if defined(STM32H7)
}
#endif
/* Note: RX and TX handled differently in this device. */ /* Note: RX and TX handled differently in this device. */
if (intsts & OTG_GINTSTS_RXFLVL) { if (intsts & OTG_GINTSTS_RXFLVL) {
/* Receive FIFO non-empty. */ /* Receive FIFO non-empty. */
uint32_t rxstsp = REBASE(OTG_GRXSTSP); const uint32_t rxstsp = REBASE(OTG_GRXSTSP);
uint32_t pktsts = rxstsp & OTG_GRXSTSP_PKTSTS_MASK; const uint32_t pktsts = rxstsp & OTG_GRXSTSP_PKTSTS_MASK;
uint8_t ep = rxstsp & OTG_GRXSTSP_EPNUM_MASK; const uint8_t ep = rxstsp & OTG_GRXSTSP_EPNUM_MASK;
if (pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) { if (pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) {
usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_SETUP](usbd_dev, ep); usbd_dev->user_callback_ctr[ep][USB_TRANSACTION_SETUP](usbd_dev, ep);
} }
if (pktsts == OTG_GRXSTSP_PKTSTS_OUT_COMP || pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) { if (pktsts == OTG_GRXSTSP_PKTSTS_OUT_COMP || pktsts == OTG_GRXSTSP_PKTSTS_SETUP_COMP) {
#if defined(STM32H7)
REBASE(OTG_DOEPINT(ep)) = OTG_DOEPINTX_STUP;
#endif
REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep]; REBASE(OTG_DOEPTSIZ(ep)) = usbd_dev->doeptsiz[ep];
REBASE(OTG_DOEPCTL(ep)) |= REBASE(OTG_DOEPCTL(ep)) |=
OTG_DOEPCTL0_EPENA | (usbd_dev->force_nak[ep] ? OTG_DOEPCTL0_SNAK : OTG_DOEPCTL0_CNAK); OTG_DOEPCTL0_EPENA | (usbd_dev->force_nak[ep] ? OTG_DOEPCTL0_SNAK : OTG_DOEPCTL0_CNAK);
@@ -416,7 +425,7 @@ void dwc_poll(usbd_device *usbd_dev)
usbd_dev->rxbcnt = (rxstsp & OTG_GRXSTSP_BCNT_MASK) >> 4U; usbd_dev->rxbcnt = (rxstsp & OTG_GRXSTSP_BCNT_MASK) >> 4U;
if (type == USB_TRANSACTION_SETUP) { if (type == USB_TRANSACTION_SETUP) {
dwc_ep_read_packet(usbd_dev, ep, &usbd_dev->control_state.req, 8); dwc_ep_read_packet(usbd_dev, ep, &usbd_dev->control_state.req, 8U);
} else if (usbd_dev->user_callback_ctr[ep][type]) { } else if (usbd_dev->user_callback_ctr[ep][type]) {
usbd_dev->user_callback_ctr[ep][type](usbd_dev, ep); usbd_dev->user_callback_ctr[ep][type](usbd_dev, ep);
} }