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Added USART_ prefix to bit definitions.

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This matches the new convention used throughout libopenstm32.
This commit is contained in:
Piotr Esden-Tempski
2010-01-15 00:03:29 +01:00
parent afc9cc84de
commit 667f32bd45
3 changed files with 66 additions and 66 deletions
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112
include/libopenstm32/usart.h
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@@ -90,16 +90,16 @@
/* --- USART_SR values ----------------------------------------------------- */
#define SR_CTS (1 << 9) /* N/A on UART4/5 */
#define SR_LBD (1 << 8)
#define SR_TXE (1 << 7)
#define SR_TC (1 << 6)
#define SR_RXNE (1 << 5)
#define SR_IDLE (1 << 4)
#define SR_ORE (1 << 3)
#define SR_NE (1 << 2)
#define SR_FE (1 << 1)
#define SR_PE (1 << 0)
#define USART_SR_CTS (1 << 9) /* N/A on UART4/5 */
#define USART_SR_LBD (1 << 8)
#define USART_SR_TXE (1 << 7)
#define USART_SR_TC (1 << 6)
#define USART_SR_RXNE (1 << 5)
#define USART_SR_IDLE (1 << 4)
#define USART_SR_ORE (1 << 3)
#define USART_SR_NE (1 << 2)
#define USART_SR_FE (1 << 1)
#define USART_SR_PE (1 << 0)
/* --- USART_DR values ----------------------------------------------------- */
@@ -112,68 +112,68 @@
/* --- USART_CR1 values ---------------------------------------------------- */
#define CR1_UE (1 << 13)
#define CR1_M (1 << 12)
#define CR1_WAKE (1 << 11)
#define CR1_PCE (1 << 10)
#define CR1_PS (1 << 9)
#define CR1_PEIE (1 << 8)
#define CR1_TXEIE (1 << 7)
#define CR1_TCIE (1 << 6)
#define CR1_RXNEIE (1 << 5)
#define CR1_IDLEIE (1 << 4)
#define CR1_TE (1 << 3)
#define CR1_RE (1 << 2)
#define CR1_RWU (1 << 1)
#define CR1_SBK (1 << 0)
#define USART_CR1_UE (1 << 13)
#define USART_CR1_M (1 << 12)
#define USART_CR1_WAKE (1 << 11)
#define USART_CR1_PCE (1 << 10)
#define USART_CR1_PS (1 << 9)
#define USART_CR1_PEIE (1 << 8)
#define USART_CR1_TXEIE (1 << 7)
#define USART_CR1_TCIE (1 << 6)
#define USART_CR1_RXNEIE (1 << 5)
#define USART_CR1_IDLEIE (1 << 4)
#define USART_CR1_TE (1 << 3)
#define USART_CR1_RE (1 << 2)
#define USART_CR1_RWU (1 << 1)
#define USART_CR1_SBK (1 << 0)
/* CR1_PCE / CR1_PS combined values */
#define PARITY_NONE 0x00
#define PARITY_ODD 0x02
#define PARITY_EVEN 0x03
#define USART_PARITY_NONE 0x00
#define USART_PARITY_ODD 0x02
#define USART_PARITY_EVEN 0x03
/* CR1_TE/CR1_RE combined values */
#define MODE_RX 0x01
#define MODE_TX 0x02
#define MODE_TX_RX 0x03
#define USART_MODE_RX 0x01
#define USART_MODE_TX 0x02
#define USART_MODE_TX_RX 0x03
/* --- USART_CR2 values ---------------------------------------------------- */
#define CR2_LINEN (1 << 14) /* LIN mode enable */
#define USART_CR2_LINEN (1 << 14) /* LIN mode enable */
/* USART_CR2[13:12]: STOP */
#define CR2_CLKEN (1 << 11) /* Clock enable */
#define CR2_CPOL (1 << 10) /* Clock polarity */
#define CR2_CPHA (1 << 9) /* Clock phase */
#define CR2_LBCL (1 << 8) /* Last bit clock pulse */
#define CR2_LBDIE (1 << 6) /* LIN break det. int. en. */
#define CR2_LBDL (1 << 5) /* LIN break det. length */
#define USART_CR2_CLKEN (1 << 11) /* Clock enable */
#define USART_CR2_CPOL (1 << 10) /* Clock polarity */
#define USART_CR2_CPHA (1 << 9) /* Clock phase */
#define USART_CR2_LBCL (1 << 8) /* Last bit clock pulse */
#define USART_CR2_LBDIE (1 << 6) /* LIN break det. int. en. */
#define USART_CR2_LBDL (1 << 5) /* LIN break det. length */
/* USART_CR2[3:0]: ADD */
/* STOP values */
#define STOPBITS_1 0x00 /* 1 stop bit */
#define STOPBITS_0_5 0x01 /* 0.5 stop bits */
#define STOPBITS_2 0x02 /* 2 stop bits */
#define STOPBITS_1_5 0x03 /* 1.5 stop bits */
#define USART_STOPBITS_1 0x00 /* 1 stop bit */
#define USART_STOPBITS_0_5 0x01 /* 0.5 stop bits */
#define USART_STOPBITS_2 0x02 /* 2 stop bits */
#define USART_STOPBITS_1_5 0x03 /* 1.5 stop bits */
/* --- USART_CR3 values ---------------------------------------------------- */
#define CR3_CTSIE (1 << 10) /* CTS interrupt enable */
#define CR3_CTSE (1 << 9) /* CTS enable */
#define CR3_RTSE (1 << 8) /* RTS enable */
#define CR3_DMAT (1 << 7) /* DMA enable transmitter */
#define CR3_DMAR (1 << 6) /* DMA enable receiver */
#define CR3_SCEN (1 << 5) /* Smartcard mode enable */
#define CR3_NACK (1 << 4) /* Smartcard NACK enable */
#define CR3_HDSEL (1 << 3) /* Half-duplex selection */
#define CR3_IRLP (1 << 2) /* IrDA low-power */
#define CR3_IREN (1 << 1) /* IrDA mode enable */
#define CR3_EIE (1 << 0) /* Error interrupt enable */
#define USART_CR3_CTSIE (1 << 10) /* CTS interrupt enable */
#define USART_CR3_CTSE (1 << 9) /* CTS enable */
#define USART_CR3_RTSE (1 << 8) /* RTS enable */
#define USART_CR3_DMAT (1 << 7) /* DMA enable transmitter */
#define USART_CR3_DMAR (1 << 6) /* DMA enable receiver */
#define USART_CR3_SCEN (1 << 5) /* Smartcard mode enable */
#define USART_CR3_NACK (1 << 4) /* Smartcard NACK enable */
#define USART_CR3_HDSEL (1 << 3) /* Half-duplex selection */
#define USART_CR3_IRLP (1 << 2) /* IrDA low-power */
#define USART_CR3_IREN (1 << 1) /* IrDA mode enable */
#define USART_CR3_EIE (1 << 0) /* Error interrupt enable */
/* CR3_CTSE/CR3_RTSE combined values */
#define FLOWCONTROL_NONE 0x00
#define FLOWCONTROL_RTS 0x01
#define FLOWCONTROL_CTS 0x02
#define FLOWCONTROL_RTS_CTS 0x03
#define USART_FLOWCONTROL_NONE 0x00
#define USART_FLOWCONTROL_RTS 0x01
#define USART_FLOWCONTROL_CTS 0x02
#define USART_FLOWCONTROL_RTS_CTS 0x03
/* --- USART_GTPR values --------------------------------------------------- */