[build] Remove PyYAML dependency

This converts all the YAML files to JSON files, as json parsing is built
into python instead of being a separate library requiring installation.

YAML is a superset of JSON, but putting comments in is not quite as obvious
as it is in yaml.

The following glue was used to convert yaml to json:
python -c 'import sys, yaml, json; json.dump(yaml.load(sys.stdin), sys.stdout, indent=4)' < $1 > $2

Clearly I haven't tested this on every single platform, and this
doesn't address the large blobs of yaml in the lpc4300 scripts directory,
only the cortex NVIC generation process.

I've tested a few IRQ driven example apps, and I've checked the generated
output of some known cases like the LM3s that has explicit gaps, and they are
all generated correctly.
This commit is contained in:
Karl Palsson
2013-09-06 23:43:39 +00:00
committed by Piotr Esden-Tempski
parent b4eb8a6971
commit 5c14780403
37 changed files with 1030 additions and 994 deletions

View File

@@ -0,0 +1,36 @@
{
"irqs": {
"0": "rtc",
"1": "m4core",
"2": "dma",
"4": "flasheepromat",
"5": "ethernet",
"6": "sdio",
"7": "lcd",
"8": "usb0",
"9": "usb1",
"10": "sct",
"11": "ritimer_or_wwdt",
"12": "timer0",
"13": "gint1",
"14": "pin_int4",
"15": "timer3",
"16": "mcpwm",
"17": "adc0",
"18": "i2c0_or_irc1",
"19": "sgpio",
"20": "spi_or_dac",
"21": "adc1",
"22": "ssp0_or_ssp1",
"23": "eventrouter",
"24": "usart0",
"25": "uart1",
"26": "usart2_or_c_can1",
"27": "usart3",
"28": "i2s0_or_i2s1",
"29": "c_can0"
},
"partname_humanreadable": "LPC 43xx series M0 core",
"partname_doxygen": "LPC43xx (M0)",
"includeguard": "LIBOPENCM3_LPC43xx_M0_NVIC_H"
}

View File

@@ -1,34 +0,0 @@
includeguard: LIBOPENCM3_LPC43xx_M0_NVIC_H
partname_humanreadable: LPC 43xx series M0 core
partname_doxygen: LPC43xx (M0)
irqs:
0: rtc
1: m4core
2: dma
# reserved: 3
4: flasheepromat
5: ethernet
6: sdio
7: lcd
8: usb0
9: usb1
10: sct
11: ritimer_or_wwdt
12: timer0
13: gint1
14: pin_int4
15: timer3
16: mcpwm
17: adc0
18: i2c0_or_irc1
19: sgpio
20: spi_or_dac
21: adc1
22: ssp0_or_ssp1
23: eventrouter
24: usart0
25: uart1
26: usart2_or_c_can1
27: usart3
28: i2s0_or_i2s1
29: c_can0

View File

@@ -0,0 +1,54 @@
{
"irqs": {
"0": "dac",
"1": "m0core",
"2": "dma",
"5": "ethernet",
"6": "sdio",
"7": "lcd",
"8": "usb0",
"9": "usb1",
"10": "sct",
"11": "ritimer",
"12": "timer0",
"13": "timer1",
"14": "timer2",
"15": "timer3",
"16": "mcpwm",
"17": "adc0",
"18": "i2c0",
"19": "i2c1",
"20": "spi",
"21": "adc1",
"22": "ssp0",
"23": "ssp1",
"24": "usart0",
"25": "uart1",
"26": "usart2",
"27": "usart3",
"28": "i2s0",
"29": "i2s1",
"30": "spifi",
"31": "sgpio",
"32": "pin_int0",
"33": "pin_int1",
"34": "pin_int2",
"35": "pin_int3",
"36": "pin_int4",
"37": "pin_int5",
"38": "pin_int6",
"39": "pin_int7",
"40": "gint0",
"41": "gint1",
"42": "eventrouter",
"43": "c_can1",
"46": "atimer",
"47": "rtc",
"49": "wwdt",
"51": "c_can0",
"52": "qei"
},
"partname_humanreadable": "LPC 43xx series M4 core",
"partname_doxygen": "LPC43xx (M4)",
"includeguard": "LIBOPENCM3_LPC43xx_M4_NVIC_H"
}

View File

@@ -1,55 +0,0 @@
includeguard: LIBOPENCM3_LPC43xx_M4_NVIC_H
partname_humanreadable: LPC 43xx series M4 core
partname_doxygen: LPC43xx (M4)
irqs:
0: dac
1: m0core
2: dma
# reserved: 3, 4
5: ethernet
6: sdio
7: lcd
8: usb0
9: usb1
10: sct
11: ritimer
12: timer0
13: timer1
14: timer2
15: timer3
16: mcpwm
17: adc0
18: i2c0
19: i2c1
20: spi
21: adc1
22: ssp0
23: ssp1
24: usart0
25: uart1
26: usart2
27: usart3
28: i2s0
29: i2s1
30: spifi
31: sgpio
32: pin_int0
33: pin_int1
34: pin_int2
35: pin_int3
36: pin_int4
37: pin_int5
38: pin_int6
39: pin_int7
40: gint0
41: gint1
42: eventrouter
43: c_can1
# reserved: 44, 45
46: atimer
47: rtc
# reserved: 48
49: wwdt
# reserved: 50
51: c_can0
52: qei