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This mainly moves the STM32 timers' code to the common area.

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F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only)
L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files

Note that F3 and F05 timers should fit into this scheme, with F3 having additional features.

Bundled with this is L1/pwr.h to change a documentation setting
Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118.
This commit is contained in:
Ken Sarkies
2013-03-09 14:39:01 +10:30
parent a9a85f080b
commit 5b8953124e
31 changed files with 1706 additions and 1253 deletions
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59
lib/stm32/l1/timer.c Normal file
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/** @defgroup timer_file Timers
@ingroup STM32L1xx
@brief <b>libopencm3 STM32L1xx Timers</b>
@version 1.0.0
@date 18 August 2012
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
/**@{*/
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/common/timer_common_all.h>
/*---------------------------------------------------------------------------*/
/** @brief Set Timer Option
Set timer options register on TIM2 or TIM3, used for trigger remapping.
@param[in] timer_peripheral Unsigned int32. Timer register address base
@returns Unsigned int32. Option flags TIM2: @ref tim2_opt_trigger_remap, TIM3: @ref tim3_opt_trigger_remap.
*/
void timer_set_option(u32 timer_peripheral, u32 option)
{
if (timer_peripheral == TIM2) {
TIM_OR(timer_peripheral) &= ~TIM2_OR_ITR1_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
} else if (timer_peripheral == TIM3) {
TIM_OR(timer_peripheral) &= ~TIM3_OR_ITR2_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
}
}
/**@}*/