Added output compare channel convenience functions and adapted the pwm_6step example accordingly.
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@@ -826,6 +826,19 @@
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/* DMAB[15:0]: DMA register for burst accesses */
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/* --- TIMx convenience defines -------------------------------------------- */
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/* Capture Compare channel designators */
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enum tim_oc_id {
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TIM_OC1=0,
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TIM_OC1N,
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TIM_OC2,
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TIM_OC2N,
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TIM_OC3,
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TIM_OC3N,
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TIM_OC4,
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};
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/* --- TIM functions ------------------------------------------------------- */
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void timer_set_mode(u32 timer_peripheral, u8 clock_div,
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u8 alignment, u8 direction);
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@@ -854,5 +867,20 @@ void timer_enable_compare_control_update_on_trigger(u32 timer_peripheral);
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void timer_disable_compare_control_update_on_trigger(u32 timer_peripheral);
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void timer_enable_preload_complementry_enable_bits(u32 timer_peripheral);
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void timer_disable_preload_complementry_enable_bits(u32 timer_peripheral);
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void timer_set_period(u32 timer_peripheral, u32 period);
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void timer_enable_oc_clear(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_disable_oc_clear(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_fast_mode(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_slow_mode(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_mode(u32 timer_peripheral, enum tim_oc_id oc_id, u32 mode);
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void timer_enable_oc_preload(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_disable_oc_preload(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_polarity_high(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_polarity_low(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_enable_oc_output(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_disable_oc_output(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_idle_state_set(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_idle_state_unset(u32 timer_peripheral, enum tim_oc_id oc_id);
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void timer_set_oc_value(u32 timer_peripheral, enum tim_oc_id oc_id, u32 value);
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#endif
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