stm32: common: Extract MCO source setting
This adds MCO source selection to some targets, and removes and standardizes the mask/shift usage for all targets. For devices that support MCO2, this supports only MCO1. No attempt has been made to extract MCO prescaler, which is not available on all F1 and F3.
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@@ -95,16 +95,16 @@ Control</b>
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#define RCC_CFGR_MCOPRE_DIV128 (7 << RCC_CFGR_MCOPRE_SHIFT)
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#define RCC_CFGR_MCO_SHIFT 24
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#define RCC_CFGR_MCO (15 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_NOCLK (0 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_HSI14 (1 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_LSI (2 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_LSE (3 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_SYSCLK (4 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_HSI (5 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_HSE (6 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_PLL (7 << RCC_CFGR_MCO_SHIFT)
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#define RCC_CFGR_MCO_HSI48 (8 << RCC_CFGR_MCO_SHIFT)/*f07*/
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#define RCC_CFGR_MCO_MASK 0xf
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#define RCC_CFGR_MCO_NOCLK 0
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#define RCC_CFGR_MCO_HSI14 1
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#define RCC_CFGR_MCO_LSI 2
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#define RCC_CFGR_MCO_LSE 3
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#define RCC_CFGR_MCO_SYSCLK 4
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#define RCC_CFGR_MCO_HSI 5
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#define RCC_CFGR_MCO_HSE 6
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#define RCC_CFGR_MCO_PLL 7
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#define RCC_CFGR_MCO_HSI48 8
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#define RCC_CFGR_PLLMUL_SHIFT 18
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#define RCC_CFGR_PLLMUL (0x0F << RCC_CFGR_PLLMUL_SHIFT)
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@@ -506,7 +506,6 @@ void rcc_set_pll_multiplication_factor(uint32_t mul);
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void rcc_set_ppre(uint32_t ppre);
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void rcc_set_hpre(uint32_t hpre);
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void rcc_set_prediv(uint32_t prediv);
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void rcc_set_mco(uint32_t mcosrc);
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enum rcc_osc rcc_system_clock_source(void);
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enum rcc_osc rcc_usb_clock_source(void);
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void rcc_clock_setup_in_hsi_out_8mhz(void);
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