atmel samd: Basic framework.

Thoughts: should this be a "sam0" family rather than samd?  (Much like Atmel's
own software package lumps all the cortex-m0+ devices in one family)

This was enough to get a basic blinky working at least.
This commit is contained in:
Karl Palsson
2016-04-14 00:44:26 +00:00
parent b9f3f9da49
commit 53de290fda
10 changed files with 300 additions and 0 deletions

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@@ -49,6 +49,8 @@
# include <libopencm3/sam/3u/nvic.h>
#elif defined(SAM3X)
# include <libopencm3/sam/3x/nvic.h>
#elif defined(SAMD)
# include <libopencm3/sam/d/nvic.h>
#elif defined(LM3S) || defined(LM4F)
/* Yes, we use the same interrupt table for both LM3S and LM4F */

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@@ -0,0 +1,26 @@
{
"irqs": [
"pm",
"sysctrl",
"wdt",
"rtc",
"eic",
"nvmctrl",
"dmac",
"reserved1",
"evsys",
"sercom0",
"sercom1",
"sercom2",
"tcc0",
"tc1",
"tc2",
"adc",
"ac",
"dac",
"ptc"
],
"partname_humanreadable": "Atmel SAMD series",
"partname_doxygen": "SAMD",
"includeguard": "LIBOPENCM3_SAMD_NVIC_H"
}

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@@ -0,0 +1,51 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2016 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef SAMD_MEMORYMAP_H
#define SAMD_MEMORYMAP_H
#include <libopencm3/cm3/common.h>
/* --- SAMD AHB-APB bridge A -------------------------------------------- */
#define PM_BASE (0x40000400U)
#define SYSCTRL_BASE (0x40000800U)
#define GCLK_BASE (0x40000c00U)
#define WDT_BASE (0x40001000U)
#define RTC_BASE (0x40001400U)
#define EIC_BASE (0x40001800U)
/* --- SAMD AHB-APB bridge B -------------------------------------------- */
#define DSU_BASE (0x41002000U)
#define NVMCTRL_BASE (0x41004000U)
#define PORT_BASE (0x41004400U)
#define DMAC_BASE (0x41004800U)
#define MTB_BASE (0x41006000U)
/* --- SAMD AHB-APB bridge C -------------------------------------------- */
#define EVSYS_BASE (0x42000400U)
#define SERCOM0_BASE (0x42000800U)
#define SERCOM1_BASE (0x42000c00U)
#define SERCOM2_BASE (0x42001000U)
#define TCC0_BASE (0x42001400U)
#define TC1_BASE (0x42001800U)
#define TC2_BASE (0x42001c00U)
#define ADC_BASE (0x42002000U)
#define AC_BASE (0x42002400U)
#define DAC_BASE (0x42002800U)
#define PTC_BASE (0x42002c00U)
#endif

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@@ -0,0 +1,68 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2016 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include <libopencm3/cm3/common.h>
/* --- Convenience macros ------------------------------------------------ */
#define PORTA PORT_BASE + 0
#define PORTB PORT_BASE + 0x80
/* --- PORT registers ----------------------------------------------------- */
/* Direction register */
#define PORT_DIR(port) MMIO32((port) + 0x0000)
/* Direction clear register */
#define PORT_DIRCLR(port) MMIO32((port) + 0x0004)
/* Direction set register */
#define PORT_DIRSET(port) MMIO32((port) + 0x0008)
/* Direction toggle register */
#define PORT_DIRTGL(port) MMIO32((port) + 0x000c)
/* output register */
#define PORT_OUT(port) MMIO32((port) + 0x0010)
/* output clear register */
#define PORT_OUTCLR(port) MMIO32((port) + 0x0014)
/* output set register */
#define PORT_OUTSET(port) MMIO32((port) + 0x0018)
/* output toggle register */
#define PORT_OUTTGL(port) MMIO32((port) + 0x001c)
/* input register */
#define PORT_IN(port) MMIO32((port) + 0x0020)
/* Control register */
#define PORT_CTRL(port) MMIO32((port) + 0x0024)
/* Write configuration register */
#define PORT_WRCONFIG(port) MMIO32((port) + 0x0028)
/* Peripheral multiplexing registers */
#define PORT_PMUX(port, n) MMIO8((port) + 0x0030 + (n))
/* Pin configuration registers */
#define PORT_PINCFG(port, n) MMIO8((port) + 0x0040 + (n))

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@@ -31,6 +31,8 @@
# include <libopencm3/sam/3u/memorymap.h>
#elif defined(SAM3X)
# include <libopencm3/sam/3x/memorymap.h>
#elif defined(SAMD)
# include <libopencm3/sam/d/memorymap.h>
#else
# error "Processor family not defined."
#endif