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stm32:fdcan: fix doxygen warnings

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Added some descriptions for missing parameters, (hopefully) clarified
some along the way.  Fixed all can related warnings in doxygen logs.
Added doxgen tags where meaningful comments had been provided.  Dropped
redundant comment separators.
This commit is contained in:
Karl Palsson
2021-04-16 12:38:31 +00:00
parent 32354846bd
commit 504dc95d9b
6 changed files with 96 additions and 101 deletions
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10
lib/stm32/common/fdcan_common.c
View File

@@ -140,11 +140,12 @@ struct fdcan_extended_filter *fdcan_get_flesa_addr(uint32_t canport)
return lfesa;
}
/** Returns FIFO start address in message RAM
/** Returns a pointer to an RX FIFO element in message RAM
*
* @param [in] canport FDCAN block base address. See @ref fdcan_block.
* @param [in] fifo_id ID of FIFO whose address is requested
* @returns Base address of FIFO block.
* @param [in] element_id the element number in the fifo we're requesting
* @returns a pointer to the individual element in the message ram
*/
struct fdcan_rx_fifo_element *fdcan_get_rxfifo_addr(uint32_t canport,
unsigned fifo_id, unsigned element_id)
@@ -168,10 +169,11 @@ struct fdcan_tx_event_element *fdcan_get_txevt_addr(uint32_t canport)
return rxfifo;
}
/** Returns transmit buffer start address in message RAM
/** Returns a pointer to an TX FIFO element in message RAM
*
* @param [in] canport FDCAN block base address. See @ref fdcan_block.
* @returns Base address of transmit buffer block.
* @param [in] element_id the element number in the fifo we're requesting
* @returns a pointer to the individual element in the message ram
*/
struct fdcan_tx_buffer_element *fdcan_get_txbuf_addr(uint32_t canport, unsigned element_id)
{

1
lib/stm32/g4/fdcan.c
View File

@@ -70,7 +70,6 @@ unsigned fdcan_get_fifo_element_size(uint32_t canport, unsigned fifo_id)
* as G4 has transmit buffer entries of fixed length.
*
* @param [in] canport FDCAN block base address. See @ref fdcan_block. Unused.
* @param [in] fifo_id ID of FIFO whole length is queried. Unused.
* @returns Length of FIFO entry length covering frame header and frame payload.
*/
unsigned fdcan_get_txbuf_element_size(uint32_t canport)

14
lib/stm32/h7/fdcan.c
View File

@@ -89,7 +89,6 @@ unsigned fdcan_get_fifo_element_size(uint32_t canport, unsigned fifo_id)
* size.
*
* @param [in] canport FDCAN block base address. See @ref fdcan_block.
* @param [in] fifo_id ID of FIFO whole length is queried.
* @returns Length of FIFO entry length covering frame header and frame payload.
*/
unsigned fdcan_get_txbuf_element_size(uint32_t canport)
@@ -139,7 +138,7 @@ void fdcan_init_ext_filter_ram(uint32_t canport, uint32_t flesa, uint8_t lse)
* @param [in] canport FDCAN block base address. See @ref fdcan_block.
* @param [in] fifo_id ID of fifo being configured
* @param [in] fxsa FIFO block start address offset in message RAM
* @param [in] fxs amount of entries allocated in FIFO
* @param [in] fxs number of elements to assign
*/
void fdcan_init_fifo_ram(uint32_t canport, unsigned fifo_id, uint32_t fxsa, uint8_t fxs)
{
@@ -158,9 +157,8 @@ void fdcan_init_fifo_ram(uint32_t canport, unsigned fifo_id, uint32_t fxsa, uint
* base address within CAN message RAM. Note, that there are no limitations
* nor checking on address provided.
* @param [in] canport FDCAN block base address. See @ref fdcan_block.
* @param [in] fifo_id ID of fifo being configured
* @param [in] fxsa FIFO block start address offset in message RAM
* @param [in] fxs amount of entries allocated in FIFO
* @param [in] tesa block start address offset in message RAM
* @param [in] tes number of elements to assign
*/
void fdcan_init_tx_event_ram(uint32_t canport, uint32_t tesa, uint8_t tes)
{
@@ -179,9 +177,8 @@ void fdcan_init_tx_event_ram(uint32_t canport, uint32_t tesa, uint8_t tes)
* base address within CAN message RAM. Note, that there are no limitations
* nor checking on address provided.
* @param [in] canport FDCAN block base address. See @ref fdcan_block.
* @param [in] fifo_id ID of fifo being configured
* @param [in] fxsa FIFO block start address offset in message RAM
* @param [in] fxs amount of entries allocated in FIFO
* @param [in] tbsa block start address offset in message RAM
* @param [in] tbs number of elements to assign
*/
void fdcan_init_tx_buffer_ram(uint32_t canport, uint32_t tbsa, uint8_t tbs)
{
@@ -471,3 +468,4 @@ void fdcan_set_fifo_locked_mode(uint32_t canport, bool locked)
}
}
/**@}*/