stm32f3: fix missing reg mask for adc_set_multi_mode
Missing defines for ADC_CCR DUAL values have also been added.
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@@ -53,7 +53,7 @@
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* adc_set_sample_time(ADC1, ADC_CHANNEL0, ADC_SMPR1_SMP_1DOT5CYC);
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* uint8_t channels[] = ADC_CHANNEL0;
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* adc_set_regular_sequence(ADC1, 1, channels);
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* adc_set_multi_mode(ADC_CCR_MULTI_INDEPENDENT);
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* adc_set_multi_mode(ADC_CCR_DUAL_INDEPENDENT);
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* adc_power_on(ADC1);
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* adc_start_conversion_regular(ADC1);
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* while (! adc_eoc(ADC1));
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@@ -597,10 +597,13 @@ void adc_set_clk_prescale(uint32_t adc, uint32_t prescale)
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}
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/*---------------------------------------------------------------------------*/
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/** @brief ADC Set Dual/Triple Mode
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/** @brief ADC Set Dual Mode
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*
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* The multiple mode uses ADC1 as master, ADC2 and optionally ADC3 in a slave
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* arrangement. This setting is applied to ADC1 only.
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* The multiple mode can uses these arrangement:
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* - ADC1 as master and ADC2 as slave
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* - ADC3 as master and ADC4 as slave
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*
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* This setting is applied to ADC master only (ADC1 or ADC3).
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*
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* The various modes possible are described in the reference manual.
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*
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@@ -610,7 +613,8 @@ void adc_set_clk_prescale(uint32_t adc, uint32_t prescale)
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*/
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void adc_set_multi_mode(uint32_t adc, uint32_t mode)
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{
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ADC_CCR(adc) |= mode;
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ADC_CCR(adc) &= ~ADC_CCR_DUAL_MASK;
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ADC_CCR(adc) |= (mode << ADC_CCR_DUAL_SHIFT);
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}
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/*---------------------------------------------------------------------------*/
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