stm32f3: fix missing reg mask for adc_set_multi_mode

Missing defines for ADC_CCR DUAL values have also been added.
This commit is contained in:
François Finfe
2020-02-18 11:48:11 +01:00
parent cb0661f81d
commit 49285ed8e1
2 changed files with 46 additions and 5 deletions

View File

@@ -486,6 +486,43 @@
#define ADC_CCR_DELAY_SHIFT 8
/* DUAL[4:0]: Dual ADC mode selection */
/****************************************************************************/
/** @defgroup adc_multi_mode ADC Multi mode selection
@ingroup adc_defines
@{*/
/** All ADCs independent */
#define ADC_CCR_DUAL_INDEPENDENT 0x0
/* Dual modes: (ADC1 master + ADC2 slave or ADC3 master + ADC4 slave) */
/**
* Dual modes combined regular simultaneous +
* injected simultaneous mode.
*/
#define ADC_CCR_DUAL_REG_SIMUL_AND_INJECTED_SIMUL 0x1
/**
* Dual mode Combined regular simultaneous +
* alternate trigger mode.
*/
#define ADC_CCR_DUAL_REG_SIMUL_AND_ALTERNATE_TRIG 0x2
/**
* Dual mode Combined interleaved mode +
* injected simultaneous mode.
*/
#define ADC_CCR_DUAL_REG_INTERLEAVED_AND_INJECTED_SIMUL 0x3
/** Dual mode Injected simultaneous mode only. */
#define ADC_CCR_DUAL_INJECTED_SIMUL 0x5
/** Dual mode Regular simultaneous mode only. */
#define ADC_CCR_DUAL_REGULAR_SIMUL 0x6
/** Dual mode Interleaved mode only. */
#define ADC_CCR_DUAL_INTERLEAVED 0x7
/** Dual mode Alternate trigger mode only. */
#define ADC_CCR_DUAL_ALTERNATE_TRIG 0x9
/**@}*/
#define ADC_CCR_DUAL_MASK (0x1f << 0)
#define ADC_CCR_DUAL_SHIFT 0