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swm050: Adds WDT peripheral

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Reviewed-by: Karl Palsson <karlp@tweak.net.au> (Fixed an &| in
wdt_set_time)
This commit is contained in:
Caleb Szalacinski
2019-10-27 15:12:09 -05:00
committed by Karl Palsson
parent dd18b9fdbc
commit 47b59e2df4
5 changed files with 249 additions and 1 deletions
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8
include/libopencm3/swm050/sysctl.h
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@@ -31,6 +31,14 @@
#include <libopencm3/cm3/common.h>
#include <libopencm3/swm050/memorymap.h>
/** @defgroup sysctl_bit_defs SYSCTL register bit definitions
@{*/
#define SYSCTL_SYS_CFG_2_SLEEP (1 << 4)
#define SYSCTL_SYS_CFG_1_TIMERSE0 (1 << 6)
#define SYSCTL_SYS_CFG_1_TIMERSE1 (1 << 17)
#define SYSCTL_SYS_CFG_1_WDT (1 << 4)
/**@}*/
/** @defgroup sysctl_register SYSCTL Registers
* @note System configuration registers
* @{*/

71
include/libopencm3/swm050/wdt.h Normal file
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@@ -0,0 +1,71 @@
/** @defgroup wdt_defines Watchdog Defines
*
* @brief <b>Defined Constants and Types for the SWM050 Watchdog</b>
*
* @ingroup SWM050_defines
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
/**@{*/
#ifndef LIBOPENCM3_WDT_H
#define LIBOPENCM3_WDT_H
#include <libopencm3/cm3/common.h>
#include <libopencm3/swm050/memorymap.h>
/* Watchdog mode definitions */
/** @defgroup wdt_modes Watchdog mode
@{*/
enum wdt_modes {
/* On timeout, reset the system */
WDT_MODE_RESET,
/* On timeout, generate an interrupt. If another timeout occurs without
the interrupt being cleared, reset the system. */
WDT_MODE_INT
};
/**@}*/
/** @defgroup wdt_registers Watchdog Registers
@{*/
#define WDT_CR MMIO32(WDT_BASE + 0x0)
#define WDT_TORR MMIO32(WDT_BASE + 0x04)
#define WDT_CCVR MMIO32(WDT_BASE + 0x08)
#define WDT_CRR MMIO32(WDT_BASE + 0x0C)
#define WDT_STAT MMIO32(WDT_BASE + 0x10)
#define WDT_EOI MMIO32(WDT_BASE + 0x14)
/**@}*/
BEGIN_DECLS
void wdt_setup(enum wdt_modes mode, uint8_t time1, uint8_t time2);
void wdt_enable(bool en);
void wdt_mode(enum wdt_modes mode);
void wdt_reset(void);
bool wdt_int_status(void);
void wdt_clear_int(void);
void wdt_clock_enable(bool en);
uint32_t wdt_get_value(void);
void wdt_set_time(uint8_t time1, uint8_t time2);
END_DECLS
#endif
/**@}*/