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lm4f: Implement GPIO interrupt control

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Implement an API to specifiy the interrupt trigger for GPIO pins, and
control interrupts. This completes the GPIO API.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Alexandru Gagniuc
2013-05-17 15:57:29 -05:00
committed by Piotr Esden-Tempski
parent f53839f33f
commit 4535a4c9b6
2 changed files with 191 additions and 2 deletions
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45
include/libopencm3/lm4f/gpio.h
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@@ -201,6 +201,14 @@ enum gpio_drive_strength {
GPIO_DRIVE_8MA, /**< 8mA drive */
GPIO_DRIVE_8MA_SLEW_CTL,/**< 8mA drive with slew rate control */
};
enum gpio_trigger {
GPIO_TRIG_LVL_LOW, /**< Level trigger, signal low */
GPIO_TRIG_LVL_HIGH, /**< Level trigger, signal high */
GPIO_TRIG_EDGE_FALL, /**< Falling edge trigger */
GPIO_TRIG_EDGE_RISE, /**< Rising edge trigger*/
GPIO_TRIG_EDGE_BOTH, /**< Falling and Rising edges trigger*/
};
/* =============================================================================
* Function prototypes
* ---------------------------------------------------------------------------*/
@@ -323,10 +331,43 @@ static inline void gpio_port_write(u32 gpioport, u8 data)
{
gpio_write(gpioport, GPIO_ALL, data);
}
/** @} */
void gpio_configure_trigger(u32 gpioport, enum gpio_trigger trigger, u8 gpios);
void gpio_enable_interrupts(u32 gpioport, u8 gpios);
void gpio_disable_interrupts(u32 gpioport, u8 gpios);
/* Let's keep these ones inlined. GPIO. They are designed to be used in ISRs */
/** @ingroup gpio_irq
* @{ */
/** \brief Determine if interrupt is generated by the given pin
*
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
* @param[in] srcpins source pin or group of pins to check.
*/
static inline bool gpio_is_interrupt_source(u32 gpioport, u8 srcpins)
{
return GPIO_MIS(gpioport) & srcpins;
}
/**
* \brief Mark interrupt as serviced
*
* After an interrupt is services, its flag must be cleared. If the flag is not
* cleared, then execution will jump back to the start of the ISR after the ISR
* returns.
*
* @param[in] gpioport GPIO block register address base @ref gpio_reg_base
* @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
* by OR'ing then together.
*/
static inline void gpio_clear_interrupt_flag(u32 gpioport, u8 gpios)
{
GPIO_ICR(gpioport) |= gpios;
}
/** @} */
END_DECLS
#endif