diff --git a/include/libopencm3/stm32/common/iwdg_common_all.h b/include/libopencm3/stm32/common/iwdg_common_all.h index 81c08446..921aa23f 100644 --- a/include/libopencm3/stm32/common/iwdg_common_all.h +++ b/include/libopencm3/stm32/common/iwdg_common_all.h @@ -48,6 +48,9 @@ specific memorymap.h header before including this header file.*/ /** Status register (IWDG_SR) */ #define IWDG_SR MMIO32(IWDG_BASE + 0x0c) +/** Early wake-up interrupt register (IWDG_EWCR) */ +#define IWDG_EWCR MMIO32(IWDG_BASE + 0x14) + /* --- IWDG_KR values ------------------------------------------------------ */ /* Bits [31:16]: Reserved. */ @@ -83,6 +86,14 @@ specific memorymap.h header before including this header file.*/ /* Double definition: 0x06 and 0x07 both mean DIV256 as per datasheet. */ /* #define IWDG_PR_DIV256 0x7 */ +/* --- IWDG_EWCR values ----------------------------------------------------- */ + +#define IWDG_EWCR_EWIT_SHIFT 0x0 +#define IWDG_EWCR_EWIT_MASK (0xFFF << IWDG_EWCR_EWIT_SHIFT) +#define IWDG_EWCR_EWIC (1 << 14) +#define IWDG_EWCR_EWIE (1 << 15) + + /* --- IWDG_RLR values ----------------------------------------------------- */ /* Bits [31:12]: Reserved. */ @@ -108,6 +119,9 @@ void iwdg_set_period_ms(uint32_t period); bool iwdg_reload_busy(void); bool iwdg_prescaler_busy(void); void iwdg_reset(void); +void iwdg_enable_early_wakeup(uint16_t wakeup_ms); +void iwdg_disable_early_wakeup(void); +void iwdg_ack_early_wakeup(void); END_DECLS diff --git a/include/libopencm3/stm32/common/iwdg_common_v2.h b/include/libopencm3/stm32/common/iwdg_common_v2.h index 2b7ade52..1d0ccbce 100644 --- a/include/libopencm3/stm32/common/iwdg_common_v2.h +++ b/include/libopencm3/stm32/common/iwdg_common_v2.h @@ -47,6 +47,10 @@ specific memorymap.h header before including this header file.*/ /** Window Register (IWDG_WINR) */ #define IWDG_WINR MMIO32(IWDG_BASE + 0x10) + +/** Early wake-up register (IWDG_EWCR) */ +#define IWDG_EWCR MMIO32(IWDG_BASE + 0x14) + /*****************************************************************************/ /* Register values */ /*****************************************************************************/ diff --git a/include/libopencm3/stm32/iwdg.h b/include/libopencm3/stm32/iwdg.h index 5572e25f..d91c7cb5 100644 --- a/include/libopencm3/stm32/iwdg.h +++ b/include/libopencm3/stm32/iwdg.h @@ -38,6 +38,8 @@ # include #elif defined(STM32L4) # include +#elif defined(STM32U5) +# include #elif defined(STM32G0) # include #elif defined(STM32G4) diff --git a/include/libopencm3/stm32/u5/iwdg.h b/include/libopencm3/stm32/u5/iwdg.h new file mode 100644 index 00000000..4310241d --- /dev/null +++ b/include/libopencm3/stm32/u5/iwdg.h @@ -0,0 +1,38 @@ +/** @defgroup iwdg_defines IWDG Defines + * + * @brief Defined Constants and Types for the STM32U5xx Independent Watchdog + * Timer + * + * @ingroup STM32U5xx_defines + * + * @version 1.0.0 + * + * @date 16 October 2024 + * + * LGPL License Terms @ref lgpl_license + */ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LIBOPENCM3_IWDG_H +#define LIBOPENCM3_IWDG_H + +#include + +#endif diff --git a/lib/stm32/common/iwdg_common_all.c b/lib/stm32/common/iwdg_common_all.c index 84268ef9..b1b00f70 100644 --- a/lib/stm32/common/iwdg_common_all.c +++ b/lib/stm32/common/iwdg_common_all.c @@ -150,3 +150,42 @@ void iwdg_reset(void) } /**@}*/ + +/*---------------------------------------------------------------------------*/ +/** @brief IWDG enable early wake-up + +The watchdog timer will generate IRQ when reaches Early wakeup window value. +The early interrupt is generated when the IWDCNT is lower or equal to EWIT +register. + */ +void iwdg_enable_early_wakeup(uint16_t wakeup_ms) { + IWDG_KR = IWDG_KR_UNLOCK; + // IWDG_EWCR |= IWDG_EWCR_EWIE; + wakeup_ms &= IWDG_EWCR_EWIT_MASK; + wakeup_ms <<= IWDG_EWCR_EWIT_SHIFT; + IWDG_EWCR = IWDG_EWCR_EWIE | wakeup_ms; +} +/**@}*/ + +/*---------------------------------------------------------------------------*/ +/** @brief Disables the watchdog early wake-up + +Disable watchdog early wake-up IRQ + */ +void iwdg_disable_early_wakeup(void) { + IWDG_KR = IWDG_KR_UNLOCK; + IWDG_EWCR &= ~IWDG_EWCR_EWIE; +} +/**@}*/ + +/*---------------------------------------------------------------------------*/ +/** @brief Acknowledge early wake-up + +The software must write a 1 into this bit in order to acknowledge the early +wake-up interrupt and to clear the EWIF flag. + */ +void iwdg_ack_early_wakeup(void) { + IWDG_KR = IWDG_KR_UNLOCK; + IWDG_EWCR |= IWDG_EWCR_EWIC; +} +/**@}*/ diff --git a/lib/stm32/u5/Makefile b/lib/stm32/u5/Makefile index f61d35df..1b0bbec2 100644 --- a/lib/stm32/u5/Makefile +++ b/lib/stm32/u5/Makefile @@ -35,6 +35,7 @@ TGT_CFLAGS += $(STANDARD_FLAGS) ARFLAGS = rcs +OBJS += iwdg_common_all.o OBJS += i2c_common_v2.o OBJS += usart_common_all.o usart_common_v2.o OBJS += gpio_common_all.o gpio_common_f0234.o