Fixed all warnings for examples.

This commit is contained in:
Piotr Esden-Tempski
2013-02-26 19:33:42 -08:00
parent 9c552e7585
commit 3d3ddc7014
88 changed files with 365 additions and 306 deletions

View File

@@ -26,12 +26,12 @@
u16 exti_line_state;
/* Set STM32 to 72 MHz. */
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Enable GPIOC clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
@@ -41,7 +41,7 @@ void gpio_setup(void)
GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
}
void button_setup(void)
static void button_setup(void)
{
/* Enable GPIOA clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);

View File

@@ -26,12 +26,12 @@
u16 exti_line_state;
/* Set STM32 to 72 MHz. */
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Enable GPIOC clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
@@ -41,7 +41,7 @@ void gpio_setup(void)
GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
}
void exti_setup(void)
static void exti_setup(void)
{
/* Enable GPIOA clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);

View File

@@ -29,12 +29,12 @@
u16 exti_direction = FALLING;
/* Set STM32 to 72 MHz. */
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Enable GPIOC clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
@@ -44,7 +44,7 @@ void gpio_setup(void)
GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
}
void exti_setup(void)
static void exti_setup(void)
{
/* Enable GPIOA clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);

View File

@@ -21,7 +21,7 @@
#include <libopencm3/stm32/f1/gpio.h>
/* Set STM32 to 72 MHz. */
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -29,7 +29,7 @@ void clock_setup(void)
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,

View File

@@ -63,7 +63,7 @@ struct color {
};
/* Set STM32 to 72 MHz. */
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -72,7 +72,7 @@ void clock_setup(void)
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
@@ -87,7 +87,7 @@ void gpio_setup(void)
GPIO_CNF_OUTPUT_PUSHPULL, GPIO15);
}
void send_colors(struct color *colors, int count)
static void send_colors(struct color *colors, int count)
{
int i, k;
@@ -148,7 +148,7 @@ void send_colors(struct color *colors, int count)
}
}
void reset_colors(struct color *colors, int count)
static void reset_colors(struct color *colors, int count)
{
int i;
@@ -159,7 +159,7 @@ void reset_colors(struct color *colors, int count)
}
}
void init_colors(struct color *colors, int count)
static void init_colors(struct color *colors, int count)
{
colors[0].r = 0x1F;
colors[0].g = 0;
@@ -174,7 +174,7 @@ void init_colors(struct color *colors, int count)
count = count;
}
void step_colors(struct color *colors, int count)
static void step_colors(struct color *colors, int count)
{
int i;
struct color tmp_color1;

View File

@@ -20,7 +20,7 @@
#include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/f1/gpio.h>
void gpio_setup(void)
static void gpio_setup(void)
{
/* Enable GPIOC clock. */
/* Manually: */

View File

@@ -28,12 +28,12 @@
u16 exti_direction = FALLING;
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Enable GPIOC clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
@@ -43,7 +43,7 @@ void gpio_setup(void)
GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
}
void exti_setup(void)
static void exti_setup(void)
{
/* Enable GPIOA clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
@@ -80,7 +80,7 @@ void exti0_isr(void)
}
}
void tim_setup(void)
static void tim_setup(void)
{
/* Enable TIM1 clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_TIM1EN);

View File

@@ -20,17 +20,17 @@
#include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/spi.h>
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
}
void spi_setup(void)
static void spi_setup(void)
{
/* TODO */
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* TODO */
}

View File

@@ -51,12 +51,12 @@ u16 new_time;
u16 frequency;
int debug = 0;
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Enable GPIOC clock. */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
@@ -68,7 +68,7 @@ void gpio_setup(void)
gpio_set(GPIOC, GPIO12);
}
void tim_setup(void)
static void tim_setup(void)
{
/* Enable TIM2 clock. */
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_TIM2EN);

View File

@@ -25,7 +25,7 @@
#include <libopencm3/cm3/tpiu.h>
#include <libopencm3/cm3/itm.h>
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -33,7 +33,7 @@ void clock_setup(void)
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
}
void trace_setup(void)
static void trace_setup(void)
{
/* Enable trace subsystem (we'll use ITM and TPIU). */
SCS_DEMCR |= SCS_DEMCR_TRCENA;
@@ -61,14 +61,14 @@ void trace_setup(void)
ITM_TER[0] = 1;
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
}
void trace_send_blocking(char c)
static void trace_send_blocking(char c)
{
while (!(ITM_STIM[0] & ITM_STIM_FIFOREADY))
;

View File

@@ -21,7 +21,7 @@
#include <libopencm3/stm32/f1/gpio.h>
#include <libopencm3/stm32/usart.h>
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -37,7 +37,7 @@ void clock_setup(void)
RCC_APB1ENR_USART3EN);
}
void usart_setup(void)
static void usart_setup(void)
{
/* Setup GPIO pin GPIO_USART1_TX. */
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
@@ -85,7 +85,7 @@ void usart_setup(void)
usart_enable(USART3);
}
void gpio_setup(void)
static void gpio_setup(void)
{
/* Set GPIO12 (in GPIO port C) to 'output push-pull'. */
gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,

View File

@@ -22,7 +22,7 @@
#include <libopencm3/stm32/usart.h>
#include <libopencm3/cm3/nvic.h>
void clock_setup(void)
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -34,7 +34,7 @@ void clock_setup(void)
RCC_APB2ENR_AFIOEN | RCC_APB2ENR_USART1EN);
}
void usart_setup(void)
static void usart_setup(void)
{
/* Enable the USART1 interrupt. */
nvic_enable_irq(NVIC_USART1_IRQ);
@@ -62,7 +62,7 @@ void usart_setup(void)
usart_enable(USART1);
}
void gpio_setup(void)
static void gpio_setup(void)
{
gpio_set(GPIOC, GPIO12);

View File

@@ -45,7 +45,7 @@ struct ring {
#define RING_DATA(RING) (RING)->data
#define RING_EMPTY(RING) ((RING)->begin == (RING)->end)
void ring_init(struct ring *ring, u8 *buf, ring_size_t size)
static void ring_init(struct ring *ring, u8 *buf, ring_size_t size)
{
ring->data = buf;
ring->size = size;
@@ -53,7 +53,7 @@ void ring_init(struct ring *ring, u8 *buf, ring_size_t size)
ring->end = 0;
}
s32 ring_write_ch(struct ring *ring, u8 ch)
static s32 ring_write_ch(struct ring *ring, u8 ch)
{
if (((ring->end + 1) % ring->size) != ring->begin) {
ring->data[ring->end++] = ch;
@@ -64,7 +64,7 @@ s32 ring_write_ch(struct ring *ring, u8 ch)
return -1;
}
s32 ring_write(struct ring *ring, u8 *data, ring_size_t size)
static s32 ring_write(struct ring *ring, u8 *data, ring_size_t size)
{
s32 i;
@@ -76,7 +76,7 @@ s32 ring_write(struct ring *ring, u8 *data, ring_size_t size)
return i;
}
s32 ring_read_ch(struct ring *ring, u8 *ch)
static s32 ring_read_ch(struct ring *ring, u8 *ch)
{
s32 ret = -1;
@@ -90,7 +90,8 @@ s32 ring_read_ch(struct ring *ring, u8 *ch)
return ret;
}
s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
/* Not used!
static s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
{
s32 i;
@@ -101,6 +102,7 @@ s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
return -i;
}
*/
/******************************************************************************
* The example implementation
@@ -111,7 +113,9 @@ s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
struct ring output_ring;
u8 output_ring_buffer[BUFFER_SIZE];
void clock_setup(void)
int _write(int file, char *ptr, int len);
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -123,7 +127,7 @@ void clock_setup(void)
RCC_APB2ENR_AFIOEN | RCC_APB2ENR_USART1EN);
}
void usart_setup(void)
static void usart_setup(void)
{
/* Initialize output ring buffer. */
ring_init(&output_ring, output_ring_buffer, BUFFER_SIZE);
@@ -154,7 +158,7 @@ void usart_setup(void)
usart_enable(USART1);
}
void gpio_setup(void)
static void gpio_setup(void)
{
gpio_set(GPIOC, GPIO12);
@@ -216,7 +220,7 @@ int _write(int file, char *ptr, int len)
return -1;
}
void systick_setup(void)
static void systick_setup(void)
{
/* 72MHz / 8 => 9000000 counts per second. */
systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);

View File

@@ -25,7 +25,9 @@
#include <stdio.h>
#include <errno.h>
void clock_setup(void)
int _write(int file, char *ptr, int len);
static void clock_setup(void)
{
rcc_clock_setup_in_hse_8mhz_out_72mhz();
@@ -37,7 +39,7 @@ void clock_setup(void)
RCC_APB2ENR_AFIOEN | RCC_APB2ENR_USART1EN);
}
void usart_setup(void)
static void usart_setup(void)
{
/* Setup GPIO pin GPIO_USART1_RE_TX on GPIO port B for transmit. */
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
@@ -55,7 +57,7 @@ void usart_setup(void)
usart_enable(USART1);
}
void gpio_setup(void)
static void gpio_setup(void)
{
gpio_set(GPIOC, GPIO12);

View File

@@ -177,8 +177,8 @@ static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *
* even though it's optional in the CDC spec, and we don't
* advertise it in the ACM functional descriptor.
*/
char buf[10];
struct usb_cdc_notification *notif = (void *)buf;
char local_buf[10];
struct usb_cdc_notification *notif = (void *)local_buf;
/* We echo signals back to host as notification. */
notif->bmRequestType = 0xA1;
@@ -186,8 +186,8 @@ static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *
notif->wValue = 0;
notif->wIndex = 0;
notif->wLength = 2;
buf[8] = req->wValue & 3;
buf[9] = 0;
local_buf[8] = req->wValue & 3;
local_buf[9] = 0;
// usbd_ep_write_packet(0x83, buf, 10);
return 1;
}

View File

@@ -143,16 +143,24 @@ static void usbdfu_getstatus_complete(usbd_device *usbd_dev, struct usb_setup_da
if (prog.blocknum == 0) {
switch (prog.buf[0]) {
case CMD_ERASE:
flash_erase_page(*(u32 *)(prog.buf + 1));
{
u32 *dat = (u32 *)(prog.buf + 1);
flash_erase_page(*dat);
}
case CMD_SETADDR:
prog.addr = *(u32 *)(prog.buf + 1);
{
u32 *dat = (u32 *)(prog.buf + 1);
prog.addr = *dat;
}
}
} else {
u32 baseaddr = prog.addr + ((prog.blocknum - 2) *
dfu_function.wTransferSize);
for (i = 0; i < prog.len; i += 2)
for (i = 0; i < prog.len; i += 2) {
u16 *dat = (u16 *)(prog.buf + i);
flash_program_half_word(baseaddr + i,
*(u16 *)(prog.buf + i));
*dat);
}
}
flash_lock();

View File

@@ -143,16 +143,24 @@ static void usbdfu_getstatus_complete(usbd_device *usbd_dev, struct usb_setup_da
if (prog.blocknum == 0) {
switch (prog.buf[0]) {
case CMD_ERASE:
flash_erase_page(*(u32 *)(prog.buf + 1));
{
u32 *dat = (u32 *)(prog.buf + 1);
flash_erase_page(*dat);
}
case CMD_SETADDR:
prog.addr = *(u32 *)(prog.buf + 1);
{
u32 *dat = (u32 *)(prog.buf + 1);
prog.addr = *dat;
}
}
} else {
u32 baseaddr = prog.addr + ((prog.blocknum - 2) *
dfu_function.wTransferSize);
for (i = 0; i < prog.len; i += 2)
for (i = 0; i < prog.len; i += 2) {
u16 *dat = (u16 *)(prog.buf + i);
flash_program_half_word(baseaddr + i,
*(u16 *)(prog.buf + i));
*dat);
}
}
flash_lock();