SWM050: Finishes GPIO, IAP flash, sysclock, sleep/stop, and the sysctl memory map.
Updates the main memory map and the makefile. Adds the SWM050 to devices.data, so that a linker script can be automatically generated. Reviewed-by: Karl Palsson <karlp@tweak.net.au>
This commit is contained in:
Caleb Szalacinski
committed by
Karl Palsson
Karl Palsson
parent
1fbfdecb17
commit
3c4ee6f4c0
55
include/libopencm3/swm050/clk.h
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55
include/libopencm3/swm050/clk.h
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@@ -0,0 +1,55 @@
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/** @defgroup clk_defines Clock Defines
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*
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* @brief <b>Defined Constants and Types for the SWM050 System Clock</b>
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*
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* @ingroup SWM050_defines
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_CLK_H
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#define LIBOPENCM3_CLK_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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/* Clock speed definitions */
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/** @defgroup clk_speeds Base Clock Speeds
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@{*/
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enum clk_speeds {
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CLK_18MHZ,
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CLK_36MHZ
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};
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/*@}*/
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/* Clock divider mask */
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/** @defgroup clk_mask Mask used to set the clock divider
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@{*/
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#define CLK_MASK 0xFFFFFC00
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/*@}*/
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BEGIN_DECLS
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void clk_speed(enum clk_speeds mhz, uint16_t div);
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END_DECLS
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#endif
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/**@}*/
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42
include/libopencm3/swm050/flash.h
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42
include/libopencm3/swm050/flash.h
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@@ -0,0 +1,42 @@
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/** @defgroup flash_defines Flash Defines
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*
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* @brief <b>Defined Constants and Types for the SWM050 Flash API</b>
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*
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* @ingroup SWM050_defines
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_FLASH_H
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#define LIBOPENCM3_FLASH_H
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#include <libopencm3/cm3/common.h>
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BEGIN_DECLS
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uint32_t flash_write(uint32_t *dest, uint32_t *src, uint8_t cnt);
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uint32_t flash_read(uint32_t *src, uint32_t *dest, uint8_t cnt);
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uint32_t flash_erase(void);
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END_DECLS
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#endif
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/**@}*/
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@@ -10,6 +10,7 @@
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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@@ -24,18 +25,14 @@
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_GPIO_H
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#define LIBOPENCM3_GPIO_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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/* GPIO number definitions (for convenience) */
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/** @defgroup gpio_pin_id GPIO Pin Identifiers
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@{*/
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#define GPIO0 (1 << 0)
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#define GPIO1 (1 << 1)
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@@ -53,46 +50,62 @@
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/* GPIO direction definitions */
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/** @defgroup gpio_dir GPIO Pin Direction
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@{*/
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#define GPIO_INPUT 0x0
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#define GPIO_OUTPUT 0x1
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enum gpio_dir {
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GPIO_INPUT,
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GPIO_OUTPUT
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};
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/**@}*/
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/* GPIO polarity definitions */
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/** @defgroup gpio_pol GPIO Polarity
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@{*/
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enum gpio_pol {
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GPIO_POL_LOW,
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GPIO_POL_HIGH
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};
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/*@}*/
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/* GPIO interrupt trigger definitions */
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/** @defgroup gpio_trig_type GPIO Interrupt Trigger Type
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@{*/
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enum gpio_trig_type {
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GPIO_TRIG_LEVEL,
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GPIO_TRIG_EDGE
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};
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/*@}*/
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/* GPIO interrupt mask definitions */
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/** @defgroup gpio_int_masked GPIO Interrupt Mask
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@{*/
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enum gpio_int_masked {
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GPIO_UNMASKED,
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GPIO_MASKED
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};
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/*@}*/
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/* GPIO Registers */
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/** @defgroup gpio_registers GPIO Registers
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@{*/
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/** Data register */
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#define GPIO_DATA MMIO32(GPIO_BASE + 0x0)
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#define GPIO_ADATA MMIO32(GPIO_BASE + 0x0)
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/** Direction register */
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#define GPIO_DIR MMIO32(GPIO_BASE + 0x4)
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#define GPIO_ADIR MMIO32(GPIO_BASE + 0x4)
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/** Interrupt enable register */
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#define GPIO_INTEN MMIO32(GPIO_BASE + 0x30)
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#define GPIO_INTEN_A MMIO32(GPIO_BASE + 0x30)
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/** Interrupt mask register */
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#define GPIO_INTMASK MMIO32(GPIO_BASE + 0x34)
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#define GPIO_INTMASK_A MMIO32(GPIO_BASE + 0x34)
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/** Interrupt trigger mode register */
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#define GPIO_INTLEVEL MMIO32(GPIO_BASE + 0x38)
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#define GPIO_INTLEVEL_A MMIO32(GPIO_BASE + 0x38)
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/** Interrupt polarity register */
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#define GPIO_INTPOLARITY MMIO32(GPIO_BASE + 0x3c)
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#define GPIO_INTPOLARITY_A MMIO32(GPIO_BASE + 0x3c)
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/** Interrupt status after masking */
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#define GPIO_INTSTATUS MMIO32(GPIO_BASE + 0x40)
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#define GPIO_INTSTAT_A MMIO32(GPIO_BASE + 0x40)
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/** Interrupt status before masking */
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#define GPIO_INTRAWSTATUS MMIO32(GPIO_BASE + 0x44)
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#define GPIO_RAWINTSTAT_A MMIO32(GPIO_BASE + 0x44)
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/** Interrupt clear register */
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#define GPIO_INTEOI MMIO32(GPIO_BASE + 0x48)
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#define GPIO_INTEOI_A MMIO32(GPIO_BASE + 0x48)
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/** External register (wat) */
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#define GPIO_EXT MMIO32(GPIO_BASE + 0x4c)
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/**@}*/
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/** @defgroup syscon_register SYSCON Registers
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* @note These registers are really part of the SYSCON system control space
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* @{*/
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/** SWD Enable register */
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#define SWD_SEL MMIO32(SYSTEM_CON_BASE + 0x30)
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/** GPIO Alternat function selection register */
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#define GPIO_SEL MMIO32(SYSTEM_CON_BASE + 0x80)
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/** GPIO Pull up register */
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#define GPIO_PULLUP MMIO32(SYSTEM_CON_BASE + 0x90)
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/** GPIO Input enable register */
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#define GPIO_INEN MMIO32(SYSTEM_CON_BASE + 0xe0)
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#define GPIO_AEXT MMIO32(GPIO_BASE + 0x4c)
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/*@}*/
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BEGIN_DECLS
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@@ -104,13 +117,16 @@ void gpio_toggle(uint16_t gpios);
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void gpio_input(uint16_t gpios);
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void gpio_output(uint16_t gpios);
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void gpio_sel_af(uint16_t gpios, bool af_en);
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void gpio_pullup(uint16_t gpios, bool en);
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void gpio_in_en(uint16_t gpios, bool en);
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void gpio_sel_swd(bool en);
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void gpio_int_enable(uint16_t gpios, bool en);
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void gpio_int_mask(uint16_t gpios, enum gpio_int_masked masked);
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void gpio_int_type(uint16_t gpios, enum gpio_trig_type type);
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void gpio_int_pol(uint16_t gpios, enum gpio_pol pol);
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uint16_t gpio_int_status(void);
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uint16_t gpio_int_raw_status(void);
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void gpio_int_clear(uint16_t gpios);
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END_DECLS
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#endif
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/**@}*/
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/**@}*/
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@@ -1,3 +1,11 @@
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/** @defgroup mmap_defines Memory Map
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*
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* @brief <b>Defined Constants for the SWM050 Memory Map</b>
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*
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* @ingroup SWM050_defines
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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@@ -16,13 +24,14 @@
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_MEMORYMAP_H
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#define LIBOPENCM3_MEMORYMAP_H
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#include <libopencm3/cm3/memorymap.h>
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/* Memory map for all buses */
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/** @defgroup memory_map Memory Map for All Buses
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@{*/
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#define PERIPH_BASE (0x40000000U)
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#define SYSTEM_CON_BASE (PERIPH_BASE + 0x0)
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@@ -31,5 +40,7 @@
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#define TIMER_SE1_BASE (PERIPH_BASE + 0x2400)
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#define WDT_BASE (PERIPH_BASE + 0x19000)
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#define SYSCTL_BASE (PERIPH_BASE + 0xf0000)
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/*@}*/
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#endif
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/**@}*/
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40
include/libopencm3/swm050/pwr.h
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40
include/libopencm3/swm050/pwr.h
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@@ -0,0 +1,40 @@
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/** @defgroup pwr_defines Power/Sleep Defines
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*
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* @brief <b>Defined Constants and Types for the SWM050 Power/Sleep API</b>
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*
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* @ingroup SWM050_defines
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_PWR_H
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#define LIBOPENCM3_PWR_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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BEGIN_DECLS
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void pwr_sleep(void);
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END_DECLS
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#endif
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/**@}*/
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57
include/libopencm3/swm050/syscon.h
Normal file
57
include/libopencm3/swm050/syscon.h
Normal file
@@ -0,0 +1,57 @@
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/** @defgroup syscon_defines SYSCON Defines
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*
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* @brief <b>Defined Constants and Types for the SWM050 SYSCON peripheral</b>
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*
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* @ingroup SWM050_defines
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**@{*/
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#ifndef LIBOPENCM3_SYSCON_H
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#define LIBOPENCM3_SYSCON_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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/* SYSCON Registers */
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/** @defgroup syscon_registers SYSCON Registers
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@{*/
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/** SWD Enable register */
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#define SYSCON_SWD_SEL MMIO32(SYSTEM_CON_BASE + 0x30)
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/** Pin Alternate function selection register */
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#define SYSCON_PORTA_SEL MMIO32(SYSTEM_CON_BASE + 0x80)
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/** Pin Pull up register */
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#define SYSCON_PORTA_PULLUP MMIO32(SYSTEM_CON_BASE + 0x90)
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/** Pin Input enable register */
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#define SYSCON_PORTA_INEN MMIO32(SYSTEM_CON_BASE + 0xe0)
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/*@}*/
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BEGIN_DECLS
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void syscon_sel_af(uint16_t gpios, bool af_en);
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void syscon_pullup(uint16_t gpios, bool en);
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void syscon_input_enable(uint16_t gpios, bool en);
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void syscon_sel_swd(bool en);
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END_DECLS
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#endif
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/**@}*/
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50
include/libopencm3/swm050/sysctl.h
Normal file
50
include/libopencm3/swm050/sysctl.h
Normal file
@@ -0,0 +1,50 @@
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/** @defgroup sysctl_defines SYSCTL Defines
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*
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* @brief <b>Defined Constants and Types for the SWM050 SYSCTL Registers</b>
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*
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* @ingroup SWM050_defines
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*
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||||
* LGPL License Terms @ref lgpl_license
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*/
|
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/*
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* This file is part of the libopencm3 project.
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||||
*
|
||||
* Copyright (C) 2019 Caleb Szalacinski <contact@skiboy.net>
|
||||
*
|
||||
* This library is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU Lesser General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This library is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU Lesser General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU Lesser General Public License
|
||||
* along with this library. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
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/**@{*/
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#ifndef LIBOPENCM3_SYSCTL_H
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#define LIBOPENCM3_SYSCTL_H
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/swm050/memorymap.h>
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/** @defgroup sysctl_register SYSCTL Registers
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* @note System configuration registers
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* @{*/
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/** Clock dividers for TIMERSE and SCLK */
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#define SYSCTL_SYS_CFG_0 MMIO32(SYSCTL_BASE + 0x0)
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/** TIMERSE0, TIMERSE1, and WDT enable */
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#define SYSCTL_SYS_CFG_1 MMIO32(SYSCTL_BASE + 0x4)
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/** SCLK multiplier (18Mhz and 36Mhz) */
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#define SYSCTL_SYS_DBLF MMIO32(SYSCTL_BASE + 0x8)
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/** MOS Disconnect (Synwit says that this subregister is unused), Sleep Mode,
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and Internal Oscillator Disconnect. Oscillator Disconnect should probably
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not be used on the SWM050, because it has no external oscillator support */
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#define SYSCTL_SYS_CFG_2 MMIO32(SYSCTL_BASE + 0xC)
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/*@}*/
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#endif
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/**@}*/
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