Merge pull request #6 "Doxygen markup and grouping structrue"
Merge remote-tracking branch 'ksarkies/doc' Conflicts: include/libopencm3/cm3/common.h
This commit is contained in:
Piotr Esden-Tempski
@@ -72,20 +72,4 @@ typedef uint64_t u64;
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#define BIT30 (1<<30)
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#define BIT31 (1<<31)
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/* Main page for the doxygen-generated documentation: */
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/**
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* @mainpage libopencm3 Developer Documentation
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*
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* The libopencm3 project (previously known as libopenstm32) aims to create
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* a free/libre/open-source (GPL v3, or later) firmware library for various
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* ARM Cortex-M3 microcontrollers, including ST STM32, Toshiba TX03,
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* Atmel SAM3U, NXP LPC1000 and others.
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*
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* @par ""
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*
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* See the <a href="http://www.libopencm3.org">libopencm3 wiki</a> for
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* more information.
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*/
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#endif
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64
include/libopencm3/cm3/docmain.h
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64
include/libopencm3/cm3/docmain.h
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@@ -0,0 +1,64 @@
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/**
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* @mainpage libopencm3 Developer Documentation
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*
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* The libopencm3 project (previously known as libopenstm32) aims to create
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* a free/libre/open-source (GPL v3, or later) firmware library for various
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* ARM Cortex-M3 microcontrollers, including ST STM32, Toshiba TX03,
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* Atmel SAM3U, NXP LPC1000 and others.
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*
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* @par ""
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*
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* See the <a href="http://www.libopencm3.org">libopencm3 wiki</a> for
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* more information.
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LGPL License Terms @ref lgpl_license
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*/
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/** @page lgpl_license libopencm3 License
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libopencm3 is free software: you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by the Free
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Software Foundation, either version 3 of the License, or (at your option) any
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later version.
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libopencm3 is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
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PARTICULAR PURPOSE. See the GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public License along with this
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program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/** @defgroup LM3S
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Libraries for Texas instruments LM3S series.
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*/
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/** @defgroup LPC13xx
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Libraries for NXP Semiconductor LPC13xx series.
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*/
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/** @defgroup LPC17xx
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Libraries for NXP Semiconductor LPC17xx series.
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*/
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/** @defgroup STM32F
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Libraries for ST Microelectronics STM32F series.
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*/
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/** @defgroup STM32F1xx
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@ingroup STM32F
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Libraries for ST Microelectronics STM32F1xx series.
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*/
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/** @defgroup STM32F2xx
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@ingroup STM32F
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Libraries for ST Microelectronics STM32F2xx series.
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*/
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/** @defgroup STM32F4xx
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@ingroup STM32F
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Libraries for ST Microelectronics STM32F4xx series.
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*/
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13
include/libopencm3/stm32/f1/doc-stm32f1.h
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13
include/libopencm3/stm32/f1/doc-stm32f1.h
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@@ -0,0 +1,13 @@
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/** @defgroup STM32F1xx_defines
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@brief Defined Constants and Types for the STM32F1xx series
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@ingroup STM32F1xx
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@version 1.0.0
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@date 24 May 2012
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LGPL License Terms @ref lgpl_license
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*/
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@@ -1,3 +1,27 @@
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/** @file
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@ingroup STM32F1xx
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@brief <b>libopencm3 STM32F1xx Reset and Clock Control</b>
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@version 1.0.0
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@author @htmlonly © @endhtmlonly 2009 Federico Ruiz-Ugalde \<memeruiz at gmail dot com\>
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@author @htmlonly © @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
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@date 18 May 2012
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LGPL License Terms @ref lgpl_license
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*/
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/** @defgroup STM32F1xx_rcc_defines
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@brief Defined Constants and Types for the STM32F1xx Reset and Clock Control
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@ingroup STM32F1xx_defines
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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@@ -230,6 +254,10 @@
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/* --- RCC_AHBENR values --------------------------------------------------- */
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/** @defgroup rcc_ahbenr_en RCC_AHBENR enable values
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@ingroup STM32F1xx_rcc_defines
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@{*/
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#define RCC_AHBENR_ETHMACENRX (1 << 16)
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#define RCC_AHBENR_ETHMACENTX (1 << 15)
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#define RCC_AHBENR_ETHMACEN (1 << 14)
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@@ -241,9 +269,14 @@
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#define RCC_AHBENR_SRAMEN (1 << 2)
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#define RCC_AHBENR_DMA2EN (1 << 1)
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#define RCC_AHBENR_DMA1EN (1 << 0)
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/*@}*/
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/* --- RCC_APB2ENR values -------------------------------------------------- */
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/** @defgroup rcc_apb2enr_en RCC_APB2ENR enable values
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@ingroup STM32F1xx_rcc_defines
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@{*/
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#define RCC_APB2ENR_ADC3EN (1 << 15) /* (XX) */
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#define RCC_APB2ENR_USART1EN (1 << 14)
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#define RCC_APB2ENR_TIM8EN (1 << 13) /* (XX) */
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@@ -259,9 +292,14 @@
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#define RCC_APB2ENR_IOPBEN (1 << 3)
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#define RCC_APB2ENR_IOPAEN (1 << 2)
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#define RCC_APB2ENR_AFIOEN (1 << 0)
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/*@}*/
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/* --- RCC_APB1ENR values -------------------------------------------------- */
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/** @defgroup rcc_apb1enr_en RCC_APB1ENR enable values
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@ingroup STM32F1xx_rcc_defines
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@{*/
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#define RCC_APB1ENR_DACEN (1 << 29)
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#define RCC_APB1ENR_PWREN (1 << 28)
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#define RCC_APB1ENR_BKPEN (1 << 27)
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@@ -284,6 +322,7 @@
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#define RCC_APB1ENR_TIM4EN (1 << 2)
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#define RCC_APB1ENR_TIM3EN (1 << 1)
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#define RCC_APB1ENR_TIM2EN (1 << 0)
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/*@}*/
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/* --- RCC_BDCR values ----------------------------------------------------- */
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