From 3a85f91ed8bfe3322cda4ccec63eae2717f67f00 Mon Sep 17 00:00:00 2001 From: Aron Szabo Date: Wed, 26 Feb 2025 10:29:15 +0100 Subject: [PATCH] stm32l0: rcc: fix incorrect bit shift in rcc_set_lpuart1_sel() The function `rcc_set_lpuart1_sel()` was incorrectly using `RCC_CCIPR_LPTIM1SEL_SHIFT` instead of `RCC_CCIPR_LPUART1SEL_SHIFT`, causing incorrect LPUART1 clock source selection. This patch corrects the bit shift to ensure the LPUART1SEL field is properly updated. To verify check RM0377 Reference manual section 7.3.19. --- lib/stm32/l0/rcc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/stm32/l0/rcc.c b/lib/stm32/l0/rcc.c index 1b5632f5..a3ca427e 100644 --- a/lib/stm32/l0/rcc.c +++ b/lib/stm32/l0/rcc.c @@ -420,8 +420,8 @@ void rcc_set_lptim1_sel(uint32_t lptim1_sel) */ void rcc_set_lpuart1_sel(uint32_t lpuart1_sel) { - RCC_CCIPR &= ~(RCC_CCIPR_LPUARTxSEL_MASK << RCC_CCIPR_LPTIM1SEL_SHIFT); - RCC_CCIPR |= (lpuart1_sel << RCC_CCIPR_LPTIM1SEL_SHIFT); + RCC_CCIPR &= ~(RCC_CCIPR_LPUARTxSEL_MASK << RCC_CCIPR_LPUART1SEL_SHIFT); + RCC_CCIPR |= (lpuart1_sel << RCC_CCIPR_LPUART1SEL_SHIFT); } /*---------------------------------------------------------------------------*/