Stile fixes run, 80 char boundry.

This commit is contained in:
Piotr Esden-Tempski
2013-06-12 21:00:50 -07:00
parent 34de1e776e
commit 39fa9e4c58
45 changed files with 274 additions and 177 deletions

View File

@@ -278,7 +278,8 @@ adc_enable_analog_watchdog_regular.
@param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel
*/
void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc, uint8_t channel)
void adc_enable_analog_watchdog_on_selected_channel(uint32_t adc,
uint8_t channel)
{
uint32_t reg32;
@@ -809,7 +810,8 @@ the trigger polarity is zero, triggering is disabled.
adc_trigger_polarity_regular
*/
void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger, uint32_t polarity)
void adc_enable_external_trigger_regular(uint32_t adc, uint32_t trigger,
uint32_t polarity)
{
uint32_t reg32 = ADC_CR2(adc);
@@ -841,7 +843,8 @@ the polarity of the trigger event: rising or falling edge or both.
adc_trigger_polarity_injected
*/
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger, uint32_t polarity)
void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
uint32_t polarity)
{
uint32_t reg32 = ADC_CR2(adc);

View File

@@ -455,7 +455,8 @@ void rcc_set_rtcpre(uint32_t rtcpre)
RCC_CFGR = (reg32 | (rtcpre << 16));
}
void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq)
void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq)
{
RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) |
(plln << RCC_PLLCFGR_PLLN_SHIFT) |
@@ -463,7 +464,8 @@ void rcc_set_main_pll_hsi(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t
(pllq << RCC_PLLCFGR_PLLQ_SHIFT);
}
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp, uint32_t pllq)
void rcc_set_main_pll_hse(uint32_t pllm, uint32_t plln, uint32_t pllp,
uint32_t pllq)
{
RCC_PLLCFGR = (pllm << RCC_PLLCFGR_PLLM_SHIFT) |
(plln << RCC_PLLCFGR_PLLN_SHIFT) |