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Stile fixes run, 80 char boundry.

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This commit is contained in:
Piotr Esden-Tempski
2013-06-12 21:00:50 -07:00
parent 34de1e776e
commit 39fa9e4c58
45 changed files with 274 additions and 177 deletions
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4
lib/stm32/common/iwdg_common_all.c
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@@ -66,8 +66,8 @@ A delay of up to 5 clock cycles of the LSI clock (about 156 microseconds)
can occasionally occur if the prescale or preload registers are currently busy
loading a previous value.
@param[in] period uint32_t Period in milliseconds (< 32760) from a watchdog reset
until a system reset is issued.
@param[in] period uint32_t Period in milliseconds (< 32760) from a watchdog
reset until a system reset is issued.
*/
void iwdg_set_period_ms(uint32_t period)