stm32g0: add rng.

Regular rng peripheral, with one additional bit : clock error detection
apparently available on l4 chips).  Curiously, Clock error detection is
_disabled_ when bit is set, but bit is cleared by default, so peripheral
/ clock error detection behaves like all other chips..

NB: RNG need proper rcc_ccicr_rngsel bits set to work, no clock is set by
default. Note also that on that chip fRNGCLK must be higher than fHCLK/32

lib/stm32/g0/Makefile

@@ -43,6 +43,7 @@ OBJS += iwdg_common_all.o
 OBJS += usart_common_all.o usart_common_v2.o
 OBJS += spi_common_all.o spi_common_v1_frf.o
 OBJS += i2c_common_v2.o
+OBJS += rng_common_v1.o
 
 VPATH +=../:../../cm3:../common