Changed to use stdint types.

lib/lm4f/gpio.c

@@ -206,8 +206,8 @@ void gpio_enable_ahb_aperture(void)
  * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
  *		    by OR'ing then together
  */
-void gpio_mode_setup(u32 gpioport, enum gpio_mode mode, enum gpio_pullup pullup,
-		     u8 gpios)
+void gpio_mode_setup(uint32_t gpioport, enum gpio_mode mode, enum gpio_pullup pullup,
+		     uint8_t gpios)
 {
 	switch (mode) {
 	case GPIO_MODE_OUTPUT:
@@ -267,8 +267,8 @@ void gpio_mode_setup(u32 gpioport, enum gpio_mode mode, enum gpio_pullup pullup,
  * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
  *		    by OR'ing then together
  */
-void gpio_set_output_config(u32 gpioport, enum gpio_output_type otype,
-			     enum gpio_drive_strength drive, u8 gpios)
+void gpio_set_output_config(uint32_t gpioport, enum gpio_output_type otype,
+			     enum gpio_drive_strength drive, uint8_t gpios)
 {
 	if (otype == GPIO_OTYPE_OD) {
 		GPIO_ODR(gpioport) |= gpios;
@@ -318,10 +318,10 @@ void gpio_set_output_config(u32 gpioport, enum gpio_output_type otype,
  * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
  *		    by OR'ing then together
  */
-void gpio_set_af(u32 gpioport, u8 alt_func_num, u8 gpios)
+void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint8_t gpios)
 {
-	u32 pctl32;
-	u8 pin_mask;
+	uint32_t pctl32;
+	uint8_t pin_mask;
 	int i;
 
 	/* Did we mean to disable the alternate function? */
@@ -362,7 +362,7 @@ void gpio_set_af(u32 gpioport, u8 alt_func_num, u8 gpios)
  * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
  *		    by OR'ing then together.
  */
-void gpio_unlock_commit(u32 gpioport, u8 gpios)
+void gpio_unlock_commit(uint32_t gpioport, uint8_t gpios)
 {
 	/* Unlock the GPIO_CR register */
 	GPIO_LOCK(gpioport) = GPIO_LOCK_UNLOCK_CODE;
@@ -438,7 +438,7 @@ void gpio_unlock_commit(u32 gpioport, u8 gpios)
  * @param[in] gpioport GPIO block register address base @ref gpio_reg_base
  * @param[in] gpios Pin identifiers. @ref gpio_pin_id
  */
-void gpio_toggle(u32 gpioport, u8 gpios)
+void gpio_toggle(uint32_t gpioport, uint8_t gpios)
 {
 	/* The mask makes sure we only toggle the GPIOs we want to */
 	GPIO_DATA(gpioport)[gpios] ^= GPIO_ALL;
@@ -490,7 +490,7 @@ void gpio_toggle(u32 gpioport, u8 gpios)
  * @code{.c}
  * void gpiof_isr(void)
  * {
- *	u8 serviced_irqs = 0;
+ *	uint8_t serviced_irqs = 0;
  *
  *	// Process individual IRQs
  *	if (gpio_is_interrupt_source(GPIOF, GPIO0)) {
@@ -524,7 +524,7 @@ void gpio_toggle(u32 gpioport, u8 gpios)
  * @param[in] gpios @ref gpio_pin_id. Any combination of pins may be specified
  *		    by OR'ing then together
  */
-void gpio_configure_trigger(u32 gpioport, enum gpio_trigger trigger, u8 gpios)
+void gpio_configure_trigger(uint32_t gpioport, enum gpio_trigger trigger, uint8_t gpios)
 {
 	switch (trigger) {
 	case GPIO_TRIG_LVL_LOW:
@@ -568,7 +568,7 @@ void gpio_configure_trigger(u32 gpioport, enum gpio_trigger trigger, u8 gpios)
  *		    combination of pins may be specified by OR'ing them
  *		    together.
  */
-void gpio_enable_interrupts(u32 gpioport, u8 gpios)
+void gpio_enable_interrupts(uint32_t gpioport, uint8_t gpios)
 {
 	GPIO_IM(gpioport) |= gpios;
 }
@@ -586,7 +586,7 @@ void gpio_enable_interrupts(u32 gpioport, u8 gpios)
  *		    combination of pins may be specified by OR'ing them
  *		    together.
  */
-void gpio_disable_interrupts(u32 gpioport, u8 gpios)
+void gpio_disable_interrupts(uint32_t gpioport, uint8_t gpios)
 {
 	GPIO_IM(gpioport) |= gpios;
 }

lib/lm4f/rcc.c

@@ -100,10 +100,10 @@ Alexandru Gagniuc <mr.nuke.me@gmail.com>
  * If write access is desired (i.e. when changing the system clock via the
  * fine-grained mechanisms), then include the following  line in your code:
  * @code
- *	extern u32 lm4f_rcc_sysclk_freq;
+ *	extern uint32_t lm4f_rcc_sysclk_freq;
  * @endcode
  */
-u32 lm4f_rcc_sysclk_freq = 16000000;
+uint32_t lm4f_rcc_sysclk_freq = 16000000;
 
 
 /**
@@ -118,7 +118,7 @@ u32 lm4f_rcc_sysclk_freq = 16000000;
  */
 void rcc_configure_xtal(xtal_t xtal)
 {
-	u32 reg32;
+	uint32_t reg32;
 
 	reg32 = SYSCTL_RCC;
 	reg32 &= ~SYSCTL_RCC_XTAL_MASK;
@@ -215,7 +215,7 @@ void rcc_pll_on(void)
  */
 void rcc_set_osc_source(osc_src_t src)
 {
-	u32 reg32;
+	uint32_t reg32;
 
 	reg32 = SYSCTL_RCC2;
 	reg32 &= ~SYSCTL_RCC2_OSCSRC2_MASK;
@@ -270,9 +270,9 @@ void rcc_pll_bypass_enable(void)
  *	      caller's responsibility to ensure that the divisor will not create
  *	      a system clock that is out of spec.
  */
-void rcc_set_pll_divisor(u8 div400)
+void rcc_set_pll_divisor(uint8_t div400)
 {
-	u32 reg32;
+	uint32_t reg32;
 
 	SYSCTL_RCC |= SYSCTL_RCC_USESYSDIV;
 
@@ -293,7 +293,7 @@ void rcc_set_pll_divisor(u8 div400)
  */
 void rcc_set_pwm_divisor(pwm_clkdiv_t div)
 {
-	u32 reg32;
+	uint32_t reg32;
 
 	reg32 = SYSCTL_RCC;
 	reg32 &= ~SYSCTL_RCC_PWMDIV_MASK;
@@ -361,7 +361,7 @@ void rcc_wait_for_pll_ready(void)
  *
  * @param [in] pll_div400 The clock divisor to apply to the 400MHz PLL clock.
  */
-void rcc_change_pll_divisor(u8 pll_div400)
+void rcc_change_pll_divisor(uint8_t pll_div400)
 {
 	/* Bypass the PLL while its settings are modified */
 	rcc_pll_bypass_enable();
@@ -372,7 +372,7 @@ void rcc_change_pll_divisor(u8 pll_div400)
 	/* Disable PLL bypass to derive the system clock from the PLL clock */
 	rcc_pll_bypass_disable();
 	/* Update the system clock frequency for housekeeping */
-	lm4f_rcc_sysclk_freq = (u32)400E6 / pll_div400;
+	lm4f_rcc_sysclk_freq = (uint32_t)400E6 / pll_div400;
 }
 
 /**
@@ -380,15 +380,15 @@ void rcc_change_pll_divisor(u8 pll_div400)
  *
  * @return System clock frequency in Hz
  */
-u32 rcc_get_system_clock_frequency(void)
+uint32_t rcc_get_system_clock_frequency(void)
 {
 	return lm4f_rcc_sysclk_freq;
 }
 
 /* Get the clock frequency corresponging to a given XTAL value */
-static u32 xtal_to_freq(xtal_t xtal)
+static uint32_t xtal_to_freq(xtal_t xtal)
 {
-	const u32 freqs[] = {
+	const uint32_t freqs[] = {
 		 4000000,	/* XTAL_4M */
 		 4096000,	/* XTAL_4M_096 */
 		 4915200,	/* XTAL_4M_9152 */
@@ -440,7 +440,7 @@ static u32 xtal_to_freq(xtal_t xtal)
  *
  * @return System clock frequency in Hz
  */
-void rcc_sysclk_config(osc_src_t osc_src, xtal_t xtal, u8 pll_div400)
+void rcc_sysclk_config(osc_src_t osc_src, xtal_t xtal, uint8_t pll_div400)
 {
 	/*
 	 * We could be using the PLL at this point, or we could be running of a

lib/lm4f/uart.c

@@ -90,7 +90,7 @@
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_enable(u32 uart)
+void uart_enable(uint32_t uart)
 {
 	UART_CTL(uart) |= (UART_CTL_UARTEN | UART_CTL_RXE | UART_CTL_TXE);
 }
@@ -100,7 +100,7 @@ void uart_enable(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_disable(u32 uart)
+void uart_disable(uint32_t uart)
 {
 	UART_CTL(uart) &= ~UART_CTL_UARTEN;
 }
@@ -111,9 +111,9 @@ void uart_disable(u32 uart)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @param[in] baud Baud rate in bits per second (bps).*
  */
-void uart_set_baudrate(u32 uart, u32 baud)
+void uart_set_baudrate(uint32_t uart, uint32_t baud)
 {
-	u32 clock;
+	uint32_t clock;
 
 	/* Are we running off the internal clock or system clock? */
 	if (UART_CC(uart) == UART_CC_CS_PIOSC) {
@@ -123,7 +123,7 @@ void uart_set_baudrate(u32 uart, u32 baud)
 	}
 
 	/* Find the baudrate divisor */
-	u32 div = (((clock * 8) / baud) + 1) / 2;
+	uint32_t div = (((clock * 8) / baud) + 1) / 2;
 
 	/* Set the baudrate divisors */
 	UART_IBRD(uart) = div / 64;
@@ -136,18 +136,18 @@ void uart_set_baudrate(u32 uart, u32 baud)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @param[in] databits number of data bits per transmission.
  */
-void uart_set_databits(u32 uart, u8 databits)
+void uart_set_databits(uint32_t uart, uint8_t databits)
 {
-	u32 reg32, bits32;
+	uint32_t reg32, bitint32_t;
 
 	/* This has the same effect as using UART_LCRH_WLEN_5/6/7/8 directly */
-	bits32 = (databits - 5) << 5;
+	bitint32_t = (databits - 5) << 5;
 
 	/* TODO: What about 9 data bits? */
 
 	reg32 = UART_LCRH(uart);
 	reg32 &= ~UART_LCRH_WLEN_MASK;
-	reg32 |= bits32;
+	reg32 |= bitint32_t;
 	UART_LCRH(uart) = reg32;
 }
 
@@ -157,7 +157,7 @@ void uart_set_databits(u32 uart, u8 databits)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @param[in] bits the requested number of stopbits, either 1 or 2.
  */
-void uart_set_stopbits(u32 uart, u8 stopbits)
+void uart_set_stopbits(uint32_t uart, uint8_t stopbits)
 {
 	if (stopbits == 2) {
 		UART_LCRH(uart) |= UART_LCRH_STP2;
@@ -172,9 +172,9 @@ void uart_set_stopbits(u32 uart, u8 stopbits)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @param[in] bits the requested parity scheme.
  */
-void uart_set_parity(u32 uart, enum uart_parity parity)
+void uart_set_parity(uint32_t uart, enum uart_parity parity)
 {
-	u32 reg32;
+	uint32_t reg32;
 
 	reg32 = UART_LCRH(uart);
 	reg32 |= UART_LCRH_PEN;
@@ -213,9 +213,9 @@ void uart_set_parity(u32 uart, enum uart_parity parity)
  *                 UART_FLOWCTL_CTS -- enable the CTS line \n
  *                 UART_FLOWCTL_RTS_CTS -- enable both RTS and CTS lines
  */
-void uart_set_flow_control(u32 uart, enum uart_flowctl flow)
+void uart_set_flow_control(uint32_t uart, enum uart_flowctl flow)
 {
-	u32 reg32 = UART_CTL(uart);
+	uint32_t reg32 = UART_CTL(uart);
 
 	reg32 &= ~(UART_CTL_RTSEN | UART_CTL_CTSEN);
 
@@ -235,7 +235,7 @@ void uart_set_flow_control(u32 uart, enum uart_flowctl flow)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_clock_from_piosc(u32 uart)
+void uart_clock_from_piosc(uint32_t uart)
 {
 	UART_CC(uart) = UART_CC_CS_PIOSC;
 }
@@ -245,7 +245,7 @@ void uart_clock_from_piosc(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_clock_from_sysclk(u32 uart)
+void uart_clock_from_sysclk(uint32_t uart)
 {
 	UART_CC(uart) = UART_CC_CS_SYSCLK;
 }
@@ -272,7 +272,7 @@ void uart_clock_from_sysclk(u32 uart)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @param[in] data data to send.
  */
-void uart_send(u32 uart, u16 data)
+void uart_send(uint32_t uart, uint16_t data)
 {
 	data &= 0xFF;
 	UART_DR(uart) = data;
@@ -284,7 +284,7 @@ void uart_send(u32 uart, u16 data)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @return data from the Rx FIFO.
  */
-u16 uart_recv(u32 uart)
+uint16_t uart_recv(uint32_t uart)
 {
 	return UART_DR(uart) & UART_DR_DATA_MASK;
 }
@@ -300,7 +300,7 @@ u16 uart_recv(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_wait_send_ready(u32 uart)
+void uart_wait_send_ready(uint32_t uart)
 {
 	/* Wait until the Tx FIFO is no longer full */
 	while (UART_FR(uart) & UART_FR_TXFF);
@@ -313,7 +313,7 @@ void uart_wait_send_ready(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_wait_recv_ready(u32 uart)
+void uart_wait_recv_ready(uint32_t uart)
 {
 	/* Wait until the Tx FIFO is no longer empty */
 	while (UART_FR(uart) & UART_FR_RXFE);
@@ -327,7 +327,7 @@ void uart_wait_recv_ready(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_send_blocking(u32 uart, u16 data)
+void uart_send_blocking(uint32_t uart, uint16_t data)
 {
 	uart_wait_send_ready(uart);
 	uart_send(uart, data);
@@ -341,7 +341,7 @@ void uart_send_blocking(u32 uart, u16 data)
  * @param[in] uart UART block register address base @ref uart_reg_base
  * @return data from the Rx FIFO.
  */
-u16 uart_recv_blocking(u32 uart)
+uint16_t uart_recv_blocking(uint32_t uart)
 {
 	uart_wait_recv_ready(uart);
 	return uart_recv(uart);
@@ -395,7 +395,7 @@ u16 uart_recv_blocking(u32 uart)
  * @code{.c}
  * void uart0_isr(void)
  * {
- *	u32 serviced_irqs = 0;
+ *	uint32_t serviced_irqs = 0;
  *
  *	// Process individual IRQs
  *	if (uart_is_interrupt_source(UART0, UART_INT_RX)) {
@@ -427,7 +427,7 @@ u16 uart_recv_blocking(u32 uart)
  * @param[in] ints Interrupts which to enable. Any combination of interrupts may
  *                 be specified by OR'ing then together
  */
-void uart_enable_interrupts(u32 uart, enum uart_interrupt_flag ints)
+void uart_enable_interrupts(uint32_t uart, enum uart_interrupt_flag ints)
 {
 	UART_IM(uart) |= ints;
 }
@@ -443,7 +443,7 @@ void uart_enable_interrupts(u32 uart, enum uart_interrupt_flag ints)
  * @param[in] ints Interrupts which to disable. Any combination of interrupts
  *		   may be specified by OR'ing then together
  */
-void uart_disable_interrupts(u32 uart, enum uart_interrupt_flag ints)
+void uart_disable_interrupts(uint32_t uart, enum uart_interrupt_flag ints)
 {
 	UART_IM(uart) &= ~ints;
 }
@@ -456,7 +456,7 @@ void uart_disable_interrupts(u32 uart, enum uart_interrupt_flag ints)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_enable_rx_interrupt(u32 uart)
+void uart_enable_rx_interrupt(uint32_t uart)
 {
 	uart_enable_interrupts(uart, UART_INT_RX);
 }
@@ -466,7 +466,7 @@ void uart_enable_rx_interrupt(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_disable_rx_interrupt(u32 uart)
+void uart_disable_rx_interrupt(uint32_t uart)
 {
 	uart_disable_interrupts(uart, UART_INT_RX);
 }
@@ -479,7 +479,7 @@ void uart_disable_rx_interrupt(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_enable_tx_interrupt(u32 uart)
+void uart_enable_tx_interrupt(uint32_t uart)
 {
 	uart_enable_interrupts(uart, UART_INT_TX);
 }
@@ -489,7 +489,7 @@ void uart_enable_tx_interrupt(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_disable_tx_interrupt(u32 uart)
+void uart_disable_tx_interrupt(uint32_t uart)
 {
 	uart_disable_interrupts(uart, UART_INT_TX);
 }
@@ -505,7 +505,7 @@ void uart_disable_tx_interrupt(u32 uart)
  * @param[in] ints Interrupts which to clear. Any combination of interrupts may
  *                 be specified by OR'ing then together
  */
-void uart_clear_interrupt_flag(u32 uart, enum uart_interrupt_flag ints)
+void uart_clear_interrupt_flag(uint32_t uart, enum uart_interrupt_flag ints)
 {
 	UART_ICR(uart) |= ints;
 }
@@ -524,7 +524,7 @@ void uart_clear_interrupt_flag(u32 uart, enum uart_interrupt_flag ints)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_enable_rx_dma(u32 uart)
+void uart_enable_rx_dma(uint32_t uart)
 {
 	UART_DMACTL(uart) |= UART_DMACTL_RXDMAE;
 }
@@ -534,7 +534,7 @@ void uart_enable_rx_dma(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_disable_rx_dma(u32 uart)
+void uart_disable_rx_dma(uint32_t uart)
 {
 	UART_DMACTL(uart) &= ~UART_DMACTL_RXDMAE;
 }
@@ -544,7 +544,7 @@ void uart_disable_rx_dma(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_enable_tx_dma(u32 uart)
+void uart_enable_tx_dma(uint32_t uart)
 {
 	UART_DMACTL(uart) |= UART_DMACTL_TXDMAE;
 }
@@ -554,7 +554,7 @@ void uart_enable_tx_dma(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_disable_tx_dma(u32 uart)
+void uart_disable_tx_dma(uint32_t uart)
 {
 	UART_DMACTL(uart) &= ~UART_DMACTL_TXDMAE;
 }
@@ -591,7 +591,7 @@ void uart_disable_tx_dma(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_enable_fifo(u32 uart)
+void uart_enable_fifo(uint32_t uart)
 {
 	UART_LCRH(uart) |= UART_LCRH_FEN;
 }
@@ -601,7 +601,7 @@ void uart_enable_fifo(u32 uart)
  *
  * @param[in] uart UART block register address base @ref uart_reg_base
  */
-void uart_disable_fifo(u32 uart)
+void uart_disable_fifo(uint32_t uart)
 {
 	UART_LCRH(uart) &= ~UART_LCRH_FEN;
 }
@@ -613,7 +613,7 @@ void uart_disable_fifo(u32 uart)
  * @param[in] rx_level Trigger level for RX FIFO
  * @param[in] tx_level Trigger level for TX FIFO
  */
-void uart_set_fifo_trigger_levels(u32 uart,
+void uart_set_fifo_trigger_levels(uint32_t uart,
 				  enum uart_fifo_rx_trigger_level rx_level,
 				  enum uart_fifo_tx_trigger_level tx_level)
 {

lib/lm4f/usb_lm4f.c

@@ -176,24 +176,24 @@ static inline void lm4f_usb_soft_connect(void)
 	USB_POWER |= USB_POWER_SOFTCONN;
 }
 
-static void lm4f_set_address(usbd_device *usbd_dev, u8 addr)
+static void lm4f_set_address(usbd_device *usbd_dev, uint8_t addr)
 {
 	(void)usbd_dev;
 
 	USB_FADDR = addr & USB_FADDR_FUNCADDR_MASK;
 }
 
-static void lm4f_ep_setup(usbd_device *usbd_dev, u8 addr, u8 type, u16 max_size,
-			void (*callback) (usbd_device *usbd_dev, u8 ep))
+static void lm4f_ep_setup(usbd_device *usbd_dev, uint8_t addr, uint8_t type, uint16_t max_size,
+			void (*callback) (usbd_device *usbd_dev, uint8_t ep))
 {
 	(void)usbd_dev;
 	(void)type;
 
-	u8 reg8;
-	u16 fifo_size;
+	uint8_t reg8;
+	uint16_t fifo_size;
 
 	const bool dir_tx = addr & 0x80;
-	const u8 ep = addr & 0x0f;
+	const uint8_t ep = addr & 0x0f;
 
 	/*
 	 * We do not mess with the maximum packet size, but we can only allocate
@@ -296,11 +296,11 @@ static void lm4f_endpoints_reset(usbd_device *usbd_dev)
 	usbd_dev->fifo_mem_top = 64;
 }
 
-static void lm4f_ep_stall_set(usbd_device *usbd_dev, u8 addr, u8 stall)
+static void lm4f_ep_stall_set(usbd_device *usbd_dev, uint8_t addr, uint8_t stall)
 {
 	(void)usbd_dev;
 
-	const u8 ep = addr & 0x0f;
+	const uint8_t ep = addr & 0x0f;
 	const bool dir_tx = addr & 0x80;
 
 	if (ep == 0) {
@@ -328,11 +328,11 @@ static void lm4f_ep_stall_set(usbd_device *usbd_dev, u8 addr, u8 stall)
 	}
 }
 
-static u8 lm4f_ep_stall_get(usbd_device *usbd_dev, u8 addr)
+static uint8_t lm4f_ep_stall_get(usbd_device *usbd_dev, uint8_t addr)
 {
 	(void)usbd_dev;
 
-	const u8 ep = addr & 0x0f;
+	const uint8_t ep = addr & 0x0f;
 	const bool dir_tx = addr & 0x80;
 
 	if (ep == 0) {
@@ -346,7 +346,7 @@ static u8 lm4f_ep_stall_get(usbd_device *usbd_dev, u8 addr)
 	}
 }
 
-static void lm4f_ep_nak_set(usbd_device *usbd_dev, u8 addr, u8 nak)
+static void lm4f_ep_nak_set(usbd_device *usbd_dev, uint8_t addr, uint8_t nak)
 {
 	(void)usbd_dev;
 	(void)addr;
@@ -355,11 +355,11 @@ static void lm4f_ep_nak_set(usbd_device *usbd_dev, u8 addr, u8 nak)
 	/* NAK's are handled automatically by hardware. Move along. */
 }
 
-static u16 lm4f_ep_write_packet(usbd_device *usbd_dev, u8 addr,
-			      const void *buf, u16 len)
+static uint16_t lm4f_ep_write_packet(usbd_device *usbd_dev, uint8_t addr,
+			      const void *buf, uint16_t len)
 {
-	const u8 ep = addr & 0xf;
-	u16 i;
+	const uint8_t ep = addr & 0xf;
+	uint16_t i;
 
 	(void)usbd_dev;
 
@@ -376,14 +376,14 @@ static u16 lm4f_ep_write_packet(usbd_device *usbd_dev, u8 addr,
 	 * performance, but we don't crash.
 	 */
 	for (i = 0; i < (len & ~0x3); i += 4) {
-		USB_FIFO32(ep) = *((u32 *)(buf + i));
+		USB_FIFO32(ep) = *((uint32_t *)(buf + i));
 	}
 	if (len & 0x2) {
-		USB_FIFO16(ep) = *((u16 *)(buf + i));
+		USB_FIFO16(ep) = *((uint16_t *)(buf + i));
 		i += 2;
 	}
 	if (len & 0x1) {
-		USB_FIFO8(ep)  = *((u8 *)(buf + i));
+		USB_FIFO8(ep)  = *((uint8_t *)(buf + i));
 	}
 
 	if (ep == 0) {
@@ -405,15 +405,15 @@ static u16 lm4f_ep_write_packet(usbd_device *usbd_dev, u8 addr,
 	return i;
 }
 
-static u16 lm4f_ep_read_packet(usbd_device *usbd_dev, u8 addr, void *buf,
-			       u16 len)
+static uint16_t lm4f_ep_read_packet(usbd_device *usbd_dev, uint8_t addr, void *buf,
+			       uint16_t len)
 {
 	(void)usbd_dev;
 
-	u16 rlen;
-	u8 ep = addr & 0xf;
+	uint16_t rlen;
+	uint8_t ep = addr & 0xf;
 
-	u16 fifoin = USB_RXCOUNT(ep);
+	uint16_t fifoin = USB_RXCOUNT(ep);
 
 	rlen = (fifoin > len) ? len : fifoin;
 
@@ -423,14 +423,14 @@ static u16 lm4f_ep_read_packet(usbd_device *usbd_dev, u8 addr, void *buf,
 	 * performance, but we don't crash.
 	 */
 	for (len = 0; len < (rlen & ~0x3); len += 4) {
-		*((u32 *)(buf + len)) = USB_FIFO32(ep);
+		*((uint32_t *)(buf + len)) = USB_FIFO32(ep);
 	}
 	if (rlen & 0x2) {
-		*((u16 *)(buf + len)) = USB_FIFO16(ep);
+		*((uint16_t *)(buf + len)) = USB_FIFO16(ep);
 		len += 2;
 	}
 	if (rlen & 0x1) {
-		*((u8 *)(buf + len)) = USB_FIFO8(ep);
+		*((uint8_t *)(buf + len)) = USB_FIFO8(ep);
 	}
 
 	if (ep == 0) {
@@ -454,8 +454,8 @@ static u16 lm4f_ep_read_packet(usbd_device *usbd_dev, u8 addr, void *buf,
 
 static void lm4f_poll(usbd_device *usbd_dev)
 {
-	void (*tx_cb)(usbd_device *usbd_dev, u8 ea);
-	void (*rx_cb)(usbd_device *usbd_dev, u8 ea);
+	void (*tx_cb)(usbd_device *usbd_dev, uint8_t ea);
+	void (*rx_cb)(usbd_device *usbd_dev, uint8_t ea);
 	int i;
 
 	/*
@@ -463,10 +463,10 @@ static void lm4f_poll(usbd_device *usbd_dev)
 	 * interrupt, but we need the initial state in order to decide how to
 	 * handle events.
 	 */
-	const u8 usb_is = USB_IS;
-	const u8 usb_rxis = USB_RXIS;
-	const u8 usb_txis = USB_TXIS;
-	const u8 usb_csrl0 = USB_CSRL0;
+	const uint8_t usb_is = USB_IS;
+	const uint8_t usb_rxis = USB_RXIS;
+	const uint8_t usb_txis = USB_TXIS;
+	const uint8_t usb_csrl0 = USB_CSRL0;
 
 	if ((usb_is & USB_IM_SUSPEND) && (usbd_dev->user_callback_suspend)) {
 		usbd_dev->user_callback_suspend();