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Changed to use stdint types.

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This commit is contained in:
Piotr Esden-Tempski
2013-06-12 19:11:22 -07:00
parent 7df63fcae0
commit 34de1e776e
127 changed files with 1886 additions and 1895 deletions
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18
include/libopencm3/stm32/l1/flash.h
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@@ -69,20 +69,20 @@
#define FLASH_PECR_PELOCK (1 << 0)
/* Power down key register (FLASH_PDKEYR) */
#define FLASH_PDKEYR_PDKEY1 ((u32)0x04152637)
#define FLASH_PDKEYR_PDKEY2 ((u32)0xFAFBFCFD)
#define FLASH_PDKEYR_PDKEY1 ((uint32_t)0x04152637)
#define FLASH_PDKEYR_PDKEY2 ((uint32_t)0xFAFBFCFD)
/* Program/erase key register (FLASH_PEKEYR) */
#define FLASH_PEKEYR_PEKEY1 ((u32)0x89ABCDEF)
#define FLASH_PEKEYR_PEKEY2 ((u32)0x02030405)
#define FLASH_PEKEYR_PEKEY1 ((uint32_t)0x89ABCDEF)
#define FLASH_PEKEYR_PEKEY2 ((uint32_t)0x02030405)
/* Program memory key register (FLASH_PRGKEYR) */
#define FLASH_PRGKEYR_PRGKEY1 ((u32)0x8C9DAEBF)
#define FLASH_PRGKEYR_PRGKEY2 ((u32)0x13141516)
#define FLASH_PRGKEYR_PRGKEY1 ((uint32_t)0x8C9DAEBF)
#define FLASH_PRGKEYR_PRGKEY2 ((uint32_t)0x13141516)
/* Option byte key register (FLASH_OPTKEYR) */
#define FLASH_OPTKEYR_OPTKEY1 ((u32)0xFBEAD9C8)
#define FLASH_OPTKEYR_OPTKEY2 ((u32)0x24252627)
#define FLASH_OPTKEYR_OPTKEY1 ((uint32_t)0xFBEAD9C8)
#define FLASH_OPTKEYR_OPTKEY2 ((uint32_t)0x24252627)
/* --- FLASH_SR values ----------------------------------------------------- */
@@ -119,7 +119,7 @@ void flash_64bit_enable(void);
void flash_64bit_disable(void);
void flash_prefetch_enable(void);
void flash_prefetch_disable(void);
void flash_set_ws(u32 ws);
void flash_set_ws(uint32_t ws);
END_DECLS

6
include/libopencm3/stm32/l1/gpio.h
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@@ -251,9 +251,9 @@ BEGIN_DECLS
* TODO: this should all really be moved to a "common" gpio header
*/
void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios);
void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios);
void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios);
void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t pull_up_down, uint16_t gpios);
void gpio_set_output_options(uint32_t gpioport, uint8_t otype, uint8_t speed, uint16_t gpios);
void gpio_set_af(uint32_t gpioport, uint8_t alt_func_num, uint16_t gpios);
END_DECLS

4
include/libopencm3/stm32/l1/memorymap.h
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@@ -26,8 +26,8 @@
/* --- STM32 specific peripheral definitions ------------------------------- */
/* Memory map for all busses */
#define PERIPH_BASE ((u32)0x40000000)
#define INFO_BASE ((u32)0x1ff00000)
#define PERIPH_BASE ((uint32_t)0x40000000)
#define INFO_BASE ((uint32_t)0x1ff00000)
#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)
#define PERIPH_BASE_AHB (PERIPH_BASE + 0x20000)

34
include/libopencm3/stm32/l1/rcc.h
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@@ -412,8 +412,8 @@ extern const clock_scale_t clock_config[CLOCK_CONFIG_END];
/* --- Variable definitions ------------------------------------------------ */
extern u32 rcc_ppre1_frequency;
extern u32 rcc_ppre2_frequency;
extern uint32_t rcc_ppre1_frequency;
extern uint32_t rcc_ppre2_frequency;
/* --- Function prototypes ------------------------------------------------- */
@@ -437,21 +437,21 @@ void rcc_css_enable(void);
void rcc_css_disable(void);
void rcc_osc_bypass_enable(osc_t osc);
void rcc_osc_bypass_disable(osc_t osc);
void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en);
void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en);
void rcc_peripheral_reset(volatile u32 *reg, u32 reset);
void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset);
void rcc_set_sysclk_source(u32 clk);
void rcc_set_pll_configuration(u32 source, u32 multiplier, u32 divisor);
void rcc_set_pll_source(u32 pllsrc);
void rcc_set_adcpre(u32 adcpre);
void rcc_set_ppre2(u32 ppre2);
void rcc_set_ppre1(u32 ppre1);
void rcc_set_hpre(u32 hpre);
void rcc_set_usbpre(u32 usbpre);
void rcc_set_rtcpre(u32 rtcpre);
u32 rcc_system_clock_source(void);
void rcc_rtc_select_clock(u32 clock);
void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en);
void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en);
void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset);
void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset);
void rcc_set_sysclk_source(uint32_t clk);
void rcc_set_pll_configuration(uint32_t source, uint32_t multiplier, uint32_t divisor);
void rcc_set_pll_source(uint32_t pllsrc);
void rcc_set_adcpre(uint32_t adcpre);
void rcc_set_ppre2(uint32_t ppre2);
void rcc_set_ppre1(uint32_t ppre1);
void rcc_set_hpre(uint32_t hpre);
void rcc_set_usbpre(uint32_t usbpre);
void rcc_set_rtcpre(uint32_t rtcpre);
uint32_t rcc_system_clock_source(void);
void rcc_rtc_select_clock(uint32_t clock);
void rcc_clock_setup_msi(const clock_scale_t *clock);
void rcc_clock_setup_hsi(const clock_scale_t *clock);
void rcc_clock_setup_pll(const clock_scale_t *clock);

2
include/libopencm3/stm32/l1/timer.h
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@@ -82,7 +82,7 @@ Trigger 1 Remap
BEGIN_DECLS
void timer_set_option(u32 timer_peripheral, u32 option);
void timer_set_option(uint32_t timer_peripheral, uint32_t option);
END_DECLS