gd32: add new chip series f1x0
GD32F1X0 (X can be 3, 5, 7 and 9) is a series of Cortex-M3 MCUs by GigaDevice, which features pin-to-pin package compatibility with STM32F030 MCU line. F150 adds USB support to F130, and F170/F190 adds CAN support. Currently the code mainly targets GD32F130 and F150 chips. Some register are different between F130/150 and F170/190, just like the difference between STM32F1 Performance line and Connectivity line. From the perspective of registers and memory map, GD32F1X0 seems like a mixture between STM32F1 and STM32F0 (because it is designed to be pin-to-pin compatible with F0, but with Cortex-M3 like F1). A bunch of code are shared between STM32 and GD32, and these code are specially processed to include the GD32 headers instead of STM32 headers when meet GD32F1X0. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Karl Palsson <karlp@tweak.net.au> gd32/rcc.[ch] are forks of stm32f1/rcc gd32/flash.[ch] are forks of stm32f0/flash No attempts at deduplicating this have been done at this stage. We can see where they move in the future.
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Karl Palsson
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47
lib/gd32/f1x0/Makefile
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47
lib/gd32/f1x0/Makefile
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##
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## This file is part of the libopencm3 project.
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##
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## Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
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##
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## This library is free software: you can redistribute it and/or modify
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## it under the terms of the GNU Lesser General Public License as published by
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## the Free Software Foundation, either version 3 of the License, or
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## (at your option) any later version.
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##
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## This library is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU Lesser General Public License for more details.
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##
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## You should have received a copy of the GNU Lesser General Public License
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## along with this library. If not, see <http://www.gnu.org/licenses/>.
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##
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LIBNAME = libopencm3_gd32f1x0
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SRCLIBDIR ?= ../..
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PREFIX ?= arm-none-eabi
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CC = $(PREFIX)-gcc
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AR = $(PREFIX)-ar
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TGT_CFLAGS = -Os \
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-Wall -Wextra -Wimplicit-function-declaration \
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-Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes \
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-Wundef -Wshadow \
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-I../../../include -fno-common \
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-mcpu=cortex-m3 $(FP_FLAGS) -mthumb -Wstrict-prototypes \
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-ffunction-sections -fdata-sections -MD -DGD32F1X0
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TGT_CFLAGS += $(DEBUG_FLAGS)
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# ARFLAGS = rcsv
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ARFLAGS = rcs
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OBJS = rcc.o flash.o
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OBJS += \
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gpio_common_all.o gpio_common_f0234.o \
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rcc_common_all.o \
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flash_common_all.o flash_common_f.o flash_common_f01.o
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VPATH += ../:../../cm3:../common:../../stm32/common
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include ../../Makefile.include
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