[Style] A small coding style fixing session.
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@@ -53,11 +53,11 @@
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#define MMIO64(addr) (*(volatile uint64_t *)(addr))
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/* Generic bit-band I/O accessor functions */
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#define BBIO_SRAM(addr,bit) \
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MMIO8(((addr) & 0x0FFFFF) * 32 | 0x22000000 + (bit) * 4 )
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#define BBIO_SRAM(addr, bit) \
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MMIO8(((addr) & 0x0FFFFF) * 32 | 0x22000000 + (bit) * 4)
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#define BBIO_PERIPH(addr,bit) \
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MMIO8(((addr) & 0x0FFFFF) * 32 | 0x42000000 + (bit) * 4 )
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#define BBIO_PERIPH(addr, bit) \
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MMIO8(((addr) & 0x0FFFFF) * 32 | 0x42000000 + (bit) * 4)
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/* Generic bit definition */
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#define BIT0 (1<<0)
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@@ -244,7 +244,7 @@ void gpio_unlock_commit(uint32_t gpioport, uint8_t gpios);
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* by OR'ing then together.
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*
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* @return The level of the GPIO port. The pins not specified in gpios are
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* masked to zero.
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* masked to zero.
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*/
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static inline uint8_t gpio_read(uint32_t gpioport, uint8_t gpios)
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{
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@@ -778,7 +778,7 @@ Line Devices only
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@{*/
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/* ADC2_ETRGREG_REMAP: */
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/**
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/**
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* ADC2 external trigger regulator conversion remapping
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* (only low-, medium-, high- and XL-density devices)
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*/
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@@ -738,7 +738,7 @@ injected channels.
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#define ADC_CCR_MULTI_INDEPENDENT (0x00 << 0)
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/* Dual modes (ADC1 + ADC2) */
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/**
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/**
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* Dual modes (ADC1 + ADC2) Combined regular simultaneous +
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* injected simultaneous mode.
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*/
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@@ -55,8 +55,9 @@ do { \
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register uint16_t toggle_mask = GET_REG(REG) & (MSK); \
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register uint16_t bit_selector; \
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for (bit_selector = 1; bit_selector; bit_selector <<= 1) { \
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if ((bit_selector & (BIT)) != 0) \
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if ((bit_selector & (BIT)) != 0) { \
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toggle_mask ^= bit_selector; \
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} \
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} \
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SET_REG(REG, toggle_mask); \
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} while (0)
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