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stm32: rcc: extract osc_bypass functions

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rcc_osc_bypass_enable and rcc_osc_bypass_disable have been copy/pasted
around for the last time!  There's a compile bit to check for L0/L1, but
otherwise this is just code duplication for no gain.
This commit is contained in:
Karl Palsson
2017-05-01 22:56:28 +00:00
parent 2547bf66d9
commit 29c712326f
20 changed files with 62 additions and 382 deletions
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66
lib/stm32/f1/rcc.c
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@@ -346,72 +346,6 @@ void rcc_css_disable(void)
RCC_CR &= ~RCC_CR_CSSON;
}
/*---------------------------------------------------------------------------*/
/** @brief RCC Enable Bypass.
Enable an external clock to bypass the internal clock (high speed and low speed
clocks only). The external clock must be enabled (see @ref rcc_osc_on) and the
internal clock must be disabled (see @ref rcc_osc_off) for this to have effect.
@note The LSE clock is in the backup domain and cannot be bypassed until the
backup domain write protection has been removed (see @ref
pwr_disable_backup_domain_write_protect).
@param[in] osc enum ::osc_t. Oscillator ID. Only HSE and LSE have effect.
*/
void rcc_osc_bypass_enable(enum rcc_osc osc)
{
switch (osc) {
case RCC_HSE:
RCC_CR |= RCC_CR_HSEBYP;
break;
case RCC_LSE:
RCC_BDCR |= RCC_BDCR_LSEBYP;
break;
case RCC_PLL:
case RCC_PLL2:
case RCC_PLL3:
case RCC_HSI:
case RCC_LSI:
/* Do nothing, only HSE/LSE allowed here. */
break;
}
}
/*---------------------------------------------------------------------------*/
/** @brief RCC Disable Bypass.
Re-enable the internal clock (high speed and low speed clocks only). The
internal clock must be disabled (see @ref rcc_osc_off) for this to have effect.
@note The LSE clock is in the backup domain and cannot have bypass removed
until the backup domain write protection has been removed (see @ref
pwr_disable_backup_domain_write_protect) or the backup domain has been reset
(see @ref rcc_backupdomain_reset).
@param[in] osc enum ::osc_t. Oscillator ID. Only HSE and LSE have effect.
*/
void rcc_osc_bypass_disable(enum rcc_osc osc)
{
switch (osc) {
case RCC_HSE:
RCC_CR &= ~RCC_CR_HSEBYP;
break;
case RCC_LSE:
RCC_BDCR &= ~RCC_BDCR_LSEBYP;
break;
case RCC_PLL:
case RCC_PLL2:
case RCC_PLL3:
case RCC_HSI:
case RCC_LSI:
/* Do nothing, only HSE/LSE allowed here. */
break;
}
}
/*---------------------------------------------------------------------------*/
/** @brief RCC Set the Source for the System Clock.