From 251687fe37af0c2869c46f27e52d35c2a4679fcf Mon Sep 17 00:00:00 2001
From: Michael Ossmann <mike@ossmann.com>
Date: Wed, 6 Jun 2012 22:05:03 -0600
Subject: [PATCH] changed I2C to run directly from IRC

---
 lib/lpc43xx/i2c.c | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/lib/lpc43xx/i2c.c b/lib/lpc43xx/i2c.c
index 9d742e09..f006615e 100644
--- a/lib/lpc43xx/i2c.c
+++ b/lib/lpc43xx/i2c.c
@@ -31,21 +31,20 @@ void i2c0_init(void)
 	/* enable input on SCL and SDA pins */
 	SCU_SFSI2C0 = SCU_I2C0_NOMINAL;
 
-	/* use PLL1 as clock source for APB1 (including I2C0) */
-	CGU_BASE_APB1_CLK = (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT);
+	/* use IRC as clock source for APB1 (including I2C0) */
+	CGU_BASE_APB1_CLK = (CGU_SRC_IRC << CGU_BASE_CLK_SEL_SHIFT);
 
-	/* FIXME assuming we're on IRC at 96 MHz */
+	/* FIXME assuming we're on IRC at 12 MHz */
 
 	/* 400 kHz I2C */
-	/*
-	I2C0_SCLH = 120;
-	I2C0_SCLL = 120;
-	*/
+	I2C0_SCLH = 15;
+	I2C0_SCLL = 15;
 
 	/* 100 kHz I2C */
-	I2C0_SCLH = 480;
-	I2C0_SCLL = 480;
-	/* FIXME not sure why this appears to run at about 290 kHz */
+	/*
+	I2C0_SCLH = 60;
+	I2C0_SCLL = 60;
+	*/
 
 	/* clear the control bits */
 	I2C0_CONCLR = (I2C_CONCLR_AAC | I2C_CONCLR_SIC