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[STM32F0:SPI] Add initial support

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This commit is contained in:
BuFran
2013-07-11 13:33:54 +02:00
committed by Piotr Esden-Tempski
parent 72f38401c0
commit 210a17ec97
5 changed files with 161 additions and 3 deletions
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5
lib/stm32/common/spi_common_all.c
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@@ -81,6 +81,10 @@ spi_reg_base.
void spi_reset(uint32_t spi_peripheral)
{
/* there is another way of resetting mechanism on F0. It will be extended to all
families of stm32 and this function will be deprecated and deleted in the
future.*/
#if !defined(STM32F0)
switch (spi_peripheral) {
case SPI1:
rcc_peripheral_reset(&RCC_APB2RSTR, RCC_APB2RSTR_SPI1RST);
@@ -97,6 +101,7 @@ void spi_reset(uint32_t spi_peripheral)
break;
#endif
}
#endif
}
/* TODO: Error handling? */

4
lib/stm32/f0/Makefile
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@@ -33,11 +33,11 @@ CFLAGS = -Os -g \
ARFLAGS = rcs
OBJS = flash.o rcc.o usart.o dma.o rtc.o comparator.o
OBJS = flash.o rcc.o usart.o dma.o rtc.o comparator.o spi.o
OBJS += gpio_common_all.o gpio_common_f0234.o crc_common_all.o \
pwr_common_all.o iwdg_common_all.o rtc_common_l1f024.o \
dma_common_l1f013.o exti_common_all.o
dma_common_l1f013.o exti_common_all.o spi_common_all.o
VPATH += ../../usb:../:../../cm3:../common

42
lib/stm32/f0/spi.c Normal file
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@@ -0,0 +1,42 @@
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/spi.h>
#include <libopencm3/stm32/rcc.h>
void spi_set_data_size(uint32_t spi, uint16_t data_s)
{
SPI_CR2(spi) = (SPI_CR2(spi) & ~SPI_CR2_DS_MASK) |
(data_s & SPI_CR2_DS_MASK);
}
void spi_fifo_reception_threshold_8bit(uint32_t spi)
{
SPI_CR2(spi) |= SPI_CR2_FRXTH;
}
void spi_fifo_reception_threshold_16bit(uint32_t spi)
{
SPI_CR2(spi) &= ~SPI_CR2_FRXTH;
}
void spi_i2s_mode_spi_mode(uint32_t spi)
{
SPI_I2SCFGR(spi) &= ~SPI_I2SCFGR_I2SMOD;
}