EMTime/libopencm3
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

swm050: doxygen fixups

Browse Source 
* Include the doc-swm050.h core file that defines the base groups.
* Fix/tweak groupings to make things consistent with other targets.
* Drop redundant type information.  That's all included from the function
signatures automatically by doxygen.
* Added register descriptions from datasheet.
This commit is contained in:
Karl Palsson
2019-06-05 21:31:56 +00:00
parent 54eff24e7c
commit 1e3741cb20
3 changed files with 90 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

30
include/libopencm3/swm050/doc-swm050.h Normal file
View File

@@ -0,0 +1,30 @@
/** @mainpage libopencm3 SWM050
@version 1.0.0
API documentation for Synwit SWM050 series.
LGPL License Terms @ref lgpl_license
*/
/** @defgroup peripheral_apis Peripheral APIs
* APIs for device peripherals
*/
/** @defgroup SWM050 SWM050
Libraries for Synwit SWM050 series.
@version 1.0.0
LGPL License Terms @ref lgpl_license
*/
/** @defgroup SWM050_defines SWM050 Defines
@brief Defined Constants and Types for the SWM050 series
@version 1.0.0
LGPL License Terms @ref lgpl_license
*/

48
include/libopencm3/swm050/gpio.h
View File

@@ -1,3 +1,11 @@
/** @defgroup gpio_defines GPIO Defines
*
* @brief <b>Defined Constants and Types for the SWM050 General Purpose I/O</b>
*
* @ingroup SWM050_defines
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
@@ -17,6 +25,8 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
/**@{*/
#ifndef LIBOPENCM3_GPIO_H
#define LIBOPENCM3_GPIO_H
@@ -25,7 +35,6 @@
/* GPIO number definitions (for convenience) */
/** @defgroup gpio_pin_id GPIO Pin Identifiers
@ingroup gpio_defines
@{*/
#define GPIO0 (1 << 0)
@@ -43,28 +52,48 @@
/* GPIO direction definitions */
/** @defgroup gpio_dir GPIO Pin Direction
@ingroup gpio_defines
@{*/
#define GPIO_INPUT 0x0
#define GPIO_OUTPUT 0x1
/**@}*/
/** @defgroup gpio_registers GPIO Registers
@{*/
/** Data register */
#define GPIO_DATA MMIO32(GPIO_BASE + 0x0)
/** Direction register */
#define GPIO_DIR MMIO32(GPIO_BASE + 0x4)
/** Interrupt enable register */
#define GPIO_INTEN MMIO32(GPIO_BASE + 0x30)
/** Interrupt mask register */
#define GPIO_INTMASK MMIO32(GPIO_BASE + 0x34)
/** Interrupt trigger mode register */
#define GPIO_INTLEVEL MMIO32(GPIO_BASE + 0x38)
/** Interrupt polarity register */
#define GPIO_INTPOLARITY MMIO32(GPIO_BASE + 0x3c)
/** Interrupt status after masking */
#define GPIO_INTSTATUS MMIO32(GPIO_BASE + 0x40)
/** Interrupt status before masking */
#define GPIO_INTRAWSTATUS MMIO32(GPIO_BASE + 0x44)
/** Interrupt clear register */
#define GPIO_INTEOI MMIO32(GPIO_BASE + 0x48)
/** External register (wat) */
#define GPIO_EXT MMIO32(GPIO_BASE + 0x4c)
#define GPIO_INTEN MMIO32(GPIO_BASE + 0x30)
#define GPIO_INTMASK MMIO32(GPIO_BASE + 0x34)
#define GPIO_INTLEVEL MMIO32(GPIO_BASE + 0x38)
#define GPIO_INTPOLARITY MMIO32(GPIO_BASE + 0x3c)
#define GPIO_INTSTATUS MMIO32(GPIO_BASE + 0x40)
#define GPIO_INTRAWSTATUS MMIO32(GPIO_BASE + 0x44)
#define GPIO_INTEOI MMIO32(GPIO_BASE + 0x48)
/**@}*/
/** @defgroup syscon_register SYSCON Registers
* @note These registers are really part of the SYSCON system control space
* @{*/
/** SWD Enable register */
#define SWD_SEL MMIO32(SYSTEM_CON_BASE + 0x30)
/** GPIO Alternat function selection register */
#define GPIO_SEL MMIO32(SYSTEM_CON_BASE + 0x80)
/** GPIO Pull up register */
#define GPIO_PULLUP MMIO32(SYSTEM_CON_BASE + 0x90)
/** GPIO Input enable register */
#define GPIO_INEN MMIO32(SYSTEM_CON_BASE + 0xe0)
/*@}*/
BEGIN_DECLS
@@ -84,3 +113,4 @@ void gpio_sel_swd(bool en);
END_DECLS
#endif
/**@}*/