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Factor out cm3/common.h and cm3/memorymap.h.

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This commit is contained in:
Uwe Hermann
2010-12-30 00:53:52 +01:00
parent 01bfbfed41
commit 17b2e87ba3
30 changed files with 88 additions and 63 deletions
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35
include/libopenstm32/memorymap.h
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@@ -20,40 +20,7 @@
#ifndef LIBOPENSTM32_MEMORYMAP_H
#define LIBOPENSTM32_MEMORYMAP_H
/* --- ARM Cortex-M3 specific definitions ---------------------------------- */
/* Private peripheral bus - Internal */
#define PPBI_BASE 0xE0000000
#define ITM_BASE (PPBI_BASE + 0x0000)
#define DWT_BASE (PPBI_BASE + 0x1000)
#define FPB_BASE (PPBI_BASE + 0x2000)
/* PPBI_BASE + 0x3000 (0xE000 3000 - 0xE000 DFFF): Reserved */
#define SCS_BASE (PPBI_BASE + 0xE000)
/* PPBI_BASE + 0xF000 (0xE000 F000 - 0xE003 FFFF): Reserved */
/* --- ITM: Instrumentation Trace Macrocell --- */
/* TODO */
/* --- DWT: Data Watchpoint and Trace unit --- */
/* TODO */
/* --- FPB: Flash Patch and Breakpoint unit --- */
/* TODO */
/* --- SCS: System Control Space --- */
/* ITR: Interrupt Type Register */
#define ITR_BASE (SCS_BASE + 0x0000)
/* SYS_TICK: System Timer */
#define SYS_TICK_BASE (SCS_BASE + 0x0010)
/* NVIC: Nested Vector Interrupt Controller */
#define NVIC_BASE (SCS_BASE + 0x0100)
/* SCB: System Control Block */
#define SCB_BASE (SCS_BASE + 0x0D00)
/* STE: Software Trigger Interrupt Register */
#define STIR_BASE (SCS_BASE + 0x0F00)
/* ID: ID space */
#define ID_BASE (SCS_BASE + 0x0FD0)
#include <cm3/memorymap.h>
/* --- STM32 specific peripheral definitions ------------------------------- */