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stm32f7: pwr: added basic support for pwr (VOS and overdrive)

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This commit is contained in:
Matthew Lai
2017-04-01 02:38:52 +01:00
committed by Karl Palsson
parent 2c0e71b3c7
commit 17553da946
6 changed files with 366 additions and 10 deletions
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2
lib/stm32/f7/Makefile
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@@ -42,7 +42,7 @@ TGT_CFLAGS += $(STANDARD_FLAGS)
ARFLAGS = rcs
OBJS = rcc.o gpio.o gpio_common_all.o gpio_common_f0234.o
OBJS = pwr.o rcc.o gpio.o gpio_common_all.o gpio_common_f0234.o
OBJS += rcc_common_all.o flash_common_f234.o flash_common_f24.o

66
lib/stm32/f7/pwr.c Normal file
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@@ -0,0 +1,66 @@
/** @defgroup pwr_file PWR
*
* @ingroup STM32F7xx
*
* @brief <b>libopencm3 STM32F7xx Power Control</b>
*
* @version 1.0.0
*
* @author @htmlonly &copy; @endhtmlonly 2011 Stephen Caudle <scaudle@doceme.com>
* @author @htmlonly &copy; @endhtmlonly 2017 Matthew Lai <m@matthewlai.ca>
*
* @date 12 March 2017
*
* This library supports the power control system for the
* STM32F7 series of ARM Cortex Microcontrollers by ST Microelectronics.
*
* LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
* Copyright (C) 2017 Matthew Lai <m@matthewlai.ca>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/pwr.h>
void pwr_set_vos_scale(enum pwr_vos_scale scale)
{
PWR_CR1 &= ~PWR_CR1_VOS_MASK;
if (scale == PWR_SCALE1) {
PWR_CR1 |= PWR_CR1_VOS_SCALE_1;
} else if (scale == PWR_SCALE2) {
PWR_CR1 |= PWR_CR1_VOS_SCALE_2;
} else if (scale == PWR_SCALE3) {
PWR_CR1 |= PWR_CR1_VOS_SCALE_3;
}
}
void pwr_enable_overdrive(void)
{
PWR_CR1 |= PWR_CR1_ODEN;
while (!(PWR_CSR1 & PWR_CSR1_ODRDY));
PWR_CR1 |= PWR_CR1_ODSWEN;
while (!(PWR_CSR1 & PWR_CSR1_ODSWRDY));
}
void pwr_disable_overdrive(void)
{
PWR_CR1 &= ~(PWR_CR1_ODEN | PWR_CR1_ODSWEN);
while (!(PWR_CSR1 & PWR_CSR1_ODSWRDY));
}

19
lib/stm32/f7/rcc.c
View File

@@ -1,5 +1,6 @@
#include <libopencm3/cm3/assert.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/pwr.h>
#include <libopencm3/stm32/flash.h>
uint32_t rcc_ahb_frequency = 16000000;
@@ -12,11 +13,13 @@ const struct rcc_clock_scale rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_END] = {
.plln = 432,
.pllp = 2,
.pllq = 9,
.flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN |
FLASH_ACR_LATENCY_7WS,
.hpre = RCC_CFGR_HPRE_DIV_NONE,
.ppre1 = RCC_CFGR_PPRE_DIV_4,
.ppre2 = RCC_CFGR_PPRE_DIV_2,
.flash_config = FLASH_ACR_ICEN | FLASH_ACR_DCEN |
FLASH_ACR_LATENCY_7WS,
.vos_scale = PWR_SCALE1,
.overdrive = 1,
.apb1_frequency = 108000000,
.apb2_frequency = 216000000,
},
@@ -338,13 +341,13 @@ void rcc_clock_setup_hse_3v3(const struct rcc_clock_scale *clock)
rcc_osc_on(RCC_HSE);
rcc_wait_for_osc_ready(RCC_HSE);
/* Enable/disable high performance mode */
/* if (!clock->power_save) {
pwr_set_vos_scale(SCALE1);
} else {
pwr_set_vos_scale(SCALE2);
rcc_periph_clock_enable(RCC_PWR);
pwr_set_vos_scale(clock->vos_scale);
if (clock->overdrive) {
pwr_enable_overdrive();
}
*/
/*
* Set prescalers for AHB, ADC, ABP1, ABP2.
* Do this before touching the PLL (TODO: why?).