stm32: adc-v2: pull up voltage regulator control.

L4 and F3 actually have the same bits to write in the same order, but F3 hides
the name of the deep power down bit.  Keep the like that for now, but there's a
standard API for enabling and disabling the regulator.

include/libopencm3/stm32/common/adc_common_v2_multi.h

@@ -172,6 +172,8 @@ specific memorymap.h header before including this header file.*/
 BEGIN_DECLS
 
 void adc_set_sample_time(uint32_t adc, uint8_t channel, uint8_t time);
+void adc_enable_regulator(uint32_t adc);
+void adc_disable_regulator(uint32_t adc);
 
 END_DECLS
 

include/libopencm3/stm32/f3/adc.h

@@ -544,8 +544,6 @@ void adc_enable_external_trigger_injected(uint32_t adc, uint32_t trigger,
 bool adc_awd(uint32_t adc);
 /*void adc_set_dma_continue(uint32_t adc);*/
 /*void adc_set_dma_terminate(uint32_t adc);*/
-void adc_enable_regulator(uint32_t adc);
-void adc_disable_regulator(uint32_t adc);
 
 END_DECLS
 

include/libopencm3/stm32/l4/adc.h

@@ -54,6 +54,15 @@
 #define ADC_CHANNEL_VBAT	18
 /**@}*/
 
+/* ADC_CR Values ------------------------------------------------------------*/
+
+/* DEEPPWD: Deep power down */
+#define ADC_CR_DEEPPWD		(1 << 29)
+
+/* ADVREGEN: Voltage regulator enable bit */
+#define ADC_CR_ADVREGEN		(1 << 28)
+
+
 /****************************************************************************/
 /* ADC_SMPRx ADC Sample Time Selection for Channels */
 /** @defgroup adc_sample ADC Sample Time Selection values