stm32f3: rcc: Correct name of pll multiplier helper.
This function was badly copied and pasted from the f4 library, where there are two functions, rcc_set_main_pll_hsi and rcc_set_main_pll_hse which combine source, multipliers, dividers and other pll factors. On F3, (not all of them, but the ones we support now), the function as implemented has nothing to do with hsi / hse, and instead is simply selecting the PLL multiplier.
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@@ -366,7 +366,7 @@ void rcc_set_hpre(uint32_t hpre)
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}
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void rcc_set_main_pll_hsi(uint32_t pll)
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void rcc_set_pll_multiplier(uint32_t pll)
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{
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RCC_CFGR = (~RCC_CFGR_PLLMUL_MASK & RCC_CFGR) |
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(pll << RCC_CFGR_PLLMUL_SHIFT);
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@@ -392,7 +392,7 @@ void rcc_clock_setup_hsi(const clock_scale_t *clock)
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rcc_osc_off(PLL);
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rcc_wait_for_osc_not_ready(PLL);
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rcc_set_pll_source(clock->pllsrc);
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rcc_set_main_pll_hsi(clock->pll);
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rcc_set_pll_multiplier(clock->pll);
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/* Enable PLL oscillator and wait for it to stabilize. */
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rcc_osc_on(PLL);
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rcc_wait_for_osc_ready(PLL);
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