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stm32/h7: Fixed a couple of issues with the clock selector handling for the USARTs and peripherals

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dragonmux
2024-04-26 10:52:04 +01:00
committed by Piotr Esden-Tempski
parent 74ffe55dc5
commit 10acaab08b
1 changed files with 2 additions and 2 deletions
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4
lib/stm32/h7/rcc.c
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@@ -271,7 +271,7 @@ uint32_t rcc_get_bus_clk_freq(enum rcc_clock_source source) {
uint32_t rcc_get_usart_clk_freq(uint32_t usart)
{
uint32_t clksel, pclk;
if (usart == USART1_BASE || usart == USART6_BASE) {
if (usart == USART1_BASE || usart == USART6_BASE || usart == UART9_BASE || usart == USART10_BASE) {
pclk = rcc_clock_tree.per.pclk2_mhz * HZ_PER_MHZ;;
clksel = (RCC_D2CCIP2R >> RCC_D2CCIP2R_USART16910SEL_SHIFT) & RCC_D2CCIP2R_USARTSEL_MASK;
} else {
@@ -431,7 +431,7 @@ void rcc_set_peripheral_clk_sel(uint32_t periph, uint32_t sel) {
}
// Update the register value by masking and oring in new values.
uint32_t regval = (*reg & mask) | val;
uint32_t regval = (*reg & ~mask) | val;
*reg = regval;
}