Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL. Small changes to documentation for F2, F4 and L1 to add a parameter reference. Tested with STM32F103RBT6 (note: tests show that the PG bit must be cleared after programming, otherwise a subsequent erase attempt fails. This has been added to flash_program_half_word for F0 and F1 only. A fix for the other families is not included in this PR.)
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Frantisek Burian
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0af6d06eda
@@ -108,7 +108,7 @@ latency must be changed to the appropriate value <b>before</b> any increase in
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clock speed, or <b>after</b> any decrease in clock speed. A latency setting of
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zero only applies if 64-bit mode is not used.
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@param[in] uint32_t ws: values 0 or 1 only.
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@param[in] uint32_t ws: values from @ref flash_latency.
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*/
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void flash_set_ws(uint32_t ws)
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