Deduplication of flash code for STM32F0 and F1.

Extension of code for STM32F1 to allow for dual bank series XL.
Small changes to documentation for F2, F4 and L1 to add a parameter reference.

Tested with STM32F103RBT6
(note: tests show that the PG bit must be cleared after programming, otherwise
a subsequent erase attempt fails. This has been added to flash_program_half_word
for F0 and F1 only. A fix for the other families is not included in this PR.)
This commit is contained in:
Ken Sarkies
2014-01-24 16:16:53 +10:30
committed by Frantisek Burian
parent a4d9a41093
commit 0af6d06eda
15 changed files with 565 additions and 370 deletions

View File

@@ -108,7 +108,7 @@ latency must be changed to the appropriate value <b>before</b> any increase in
clock speed, or <b>after</b> any decrease in clock speed. A latency setting of
zero only applies if 64-bit mode is not used.
@param[in] uint32_t ws: values 0 or 1 only.
@param[in] uint32_t ws: values from @ref flash_latency.
*/
void flash_set_ws(uint32_t ws)