Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL. Small changes to documentation for F2, F4 and L1 to add a parameter reference. Tested with STM32F103RBT6 (note: tests show that the PG bit must be cleared after programming, otherwise a subsequent erase attempt fails. This has been added to flash_program_half_word for F0 and F1 only. A fix for the other families is not included in this PR.)
This commit is contained in:
committed by
Frantisek Burian
parent
a4d9a41093
commit
0af6d06eda
@@ -40,7 +40,8 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_l1f013.o \
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gpio_common_all.o i2c_common_all.o iwdg_common_all.o \
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pwr_common_all.o spi_common_all.o spi_common_l1f124.o \
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timer_common_all.o usart_common_all.o usart_common_f124.o \
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rcc_common_all.o exti_common_all.o
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rcc_common_all.o exti_common_all.o \
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flash_common_f01.o
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OBJS += usb.o usb_control.o usb_standard.o usb_f103.o usb_f107.o \
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usb_fx07_common.o
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@@ -25,6 +25,16 @@
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* provides a built-in bootloader in system memory that can be entered from a
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* running program.
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*
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* FLASH must first be unlocked before programming. In this module a write to
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* FLASH is a blocking operation until the end-of-operation flag is asserted.
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*
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* @note: don't forget to lock it again when all operations are complete.
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*
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* For the large memory XL series, with two banks of FLASH, the upper bank is
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* accessed with a second set of registers. In principle both banks can be
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* written simultaneously, or one read while the other is written. This module
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* does not support the simultaneous write feature.
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*
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* LGPL License Terms @ref lgpl_license
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*/
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/*
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@@ -50,35 +60,10 @@
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/**@{*/
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#include <libopencm3/stm32/flash.h>
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#include <libopencm3/stm32/memorymap.h>
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/*---------------------------------------------------------------------------*/
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/** @brief Enable the FLASH Prefetch Buffer
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This buffer is used for instruction fetches and is enabled by default after
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reset.
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Note carefully the clock restrictions under which the prefetch buffer may be
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enabled or disabled. Changes are normally made while the clock is running in
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the power-on low frequency mode before being set to a higher speed mode.
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See the reference manual for details.
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*/
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void flash_prefetch_buffer_enable(void)
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{
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FLASH_ACR |= FLASH_ACR_PRFTBE;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Disable the FLASH Prefetch Buffer
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Note carefully the clock restrictions under which the prefetch buffer may be
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set to disabled. See the reference manual for details.
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*/
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void flash_prefetch_buffer_disable(void)
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{
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FLASH_ACR &= ~FLASH_ACR_PRFTBE;
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}
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/* Memory Size Register */
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#define MEMORY_SIZE_REG MMIO32(DESIG_FLASH_SIZE_BASE)
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/*---------------------------------------------------------------------------*/
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/** @brief Enable the FLASH Half Cycle Mode
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@@ -107,99 +92,84 @@ void flash_halfcycle_disable(void)
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Set the Number of Wait States
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/** @brief Unlock the Flash Program and Erase Controller, upper Bank
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Used to match the system clock to the FLASH memory access time. See the
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reference manual for more information on clock speed ranges for each wait state.
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The latency must be changed to the appropriate value <b>before</b> any increase
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in clock speed, or <b>after</b> any decrease in clock speed.
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@param[in] uint32_t ws: values 0, 1 or 2 only.
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This enables write access to the upper bank of the Flash memory in XL devices.
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It is locked by default on reset.
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*/
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void flash_set_ws(uint32_t ws)
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void flash_unlock_upper(void)
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{
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uint32_t reg32;
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if (MEMORY_SIZE_REG > 512) {
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reg32 = FLASH_ACR;
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reg32 &= ~((1 << 0) | (1 << 1) | (1 << 2));
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reg32 |= ws;
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FLASH_ACR = reg32;
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/* Clear the unlock state. */
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FLASH_CR2 |= FLASH_CR_LOCK;
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/* Authorize the FPEC access. */
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FLASH_KEYR2 = FLASH_KEYR_KEY1;
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FLASH_KEYR2 = FLASH_KEYR_KEY2;
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}
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Unlock the Flash Program and Erase Controller
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This enables write access to the Flash memory. It is locked by default on
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reset.
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*/
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void flash_unlock(void)
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{
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/* Clear the unlock state. */
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FLASH_CR |= FLASH_CR_LOCK;
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/* Authorize the FPEC access. */
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FLASH_KEYR = FLASH_KEYR_KEY1;
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FLASH_KEYR = FLASH_KEYR_KEY2;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Lock the Flash Program and Erase Controller
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/** @brief Lock the Flash Program and Erase Controller, upper Bank
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Used to prevent spurious writes to FLASH.
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*/
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void flash_lock(void)
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void flash_lock_upper(void)
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{
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FLASH_CR |= FLASH_CR_LOCK;
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FLASH_CR2 |= FLASH_CR_LOCK;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Programming Error Status Flag
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/** @brief Clear the Programming Error Status Flag, upper Bank
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*/
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void flash_clear_pgerr_flag(void)
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void flash_clear_pgerr_flag_upper(void)
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{
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FLASH_SR |= FLASH_SR_PGERR;
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if (MEMORY_SIZE_REG > 512)
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FLASH_SR2 |= FLASH_SR_PGERR;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the End of Operation Status Flag
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/** @brief Clear the End of Operation Status Flag, upper Bank
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*/
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void flash_clear_eop_flag(void)
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void flash_clear_eop_flag_upper(void)
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{
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FLASH_SR |= FLASH_SR_EOP;
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if (MEMORY_SIZE_REG > 512)
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FLASH_SR2 |= FLASH_SR_EOP;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Write Protect Error Status Flag
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/** @brief Clear the Write Protect Error Status Flag, upper Bank
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*/
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void flash_clear_wrprterr_flag(void)
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void flash_clear_wrprterr_flag_upper(void)
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{
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FLASH_SR |= FLASH_SR_WRPRTERR;
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if (MEMORY_SIZE_REG > 512)
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FLASH_SR2 |= FLASH_SR_WRPRTERR;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear the Busy Status Flag
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/** @brief Clear the Busy Status Flag, upper Bank
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*/
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void flash_clear_bsy_flag(void)
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void flash_clear_bsy_flag_upper(void)
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{
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FLASH_SR &= ~FLASH_SR_BSY;
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if (MEMORY_SIZE_REG > 512)
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FLASH_SR2 &= ~FLASH_SR_BSY;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Clear All Status Flags
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Program error, end of operation, write protect error, busy.
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Program error, end of operation, write protect error, busy. Both banks cleared.
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*/
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void flash_clear_status_flags(void)
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@@ -208,6 +178,12 @@ void flash_clear_status_flags(void)
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flash_clear_eop_flag();
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flash_clear_wrprterr_flag();
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flash_clear_bsy_flag();
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if (MEMORY_SIZE_REG > 512) {
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flash_clear_pgerr_flag_upper();
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flash_clear_eop_flag_upper();
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flash_clear_wrprterr_flag_upper();
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flash_clear_bsy_flag_upper();
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}
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}
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/*---------------------------------------------------------------------------*/
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@@ -216,77 +192,25 @@ void flash_clear_status_flags(void)
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The programming error, end of operation, write protect error and busy flags
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are returned in the order of appearance in the status register.
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Flags for the upper bank, where appropriate, are combined with those for
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the lower bank using bitwise OR, without distinction.
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@returns uint32_t. bit 0: busy, bit 2: programming error, bit 4: write protect
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error, bit 5: end of operation.
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*/
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uint32_t flash_get_status_flags(void)
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{
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return FLASH_SR &= (FLASH_SR_PGERR |
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uint32_t flags = (FLASH_SR & (FLASH_SR_PGERR |
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FLASH_SR_EOP |
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FLASH_SR_WRPRTERR |
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FLASH_SR_BSY);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Unlock the Option Byte Access
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This enables write access to the option bytes. It is locked by default on
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reset.
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*/
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void flash_unlock_option_bytes(void)
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{
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/* F1 uses same keys for flash and option */
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FLASH_OPTKEYR = FLASH_KEYR_KEY1;
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FLASH_OPTKEYR = FLASH_KEYR_KEY2;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Wait until Last Operation has Ended
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This loops indefinitely until an operation (write or erase) has completed by
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testing the busy flag.
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*/
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void flash_wait_for_last_operation(void)
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{
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while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Program a 32 bit Word to FLASH
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This performs all operations necessary to program a 32 bit word to FLASH memory.
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The program error flag should be checked separately for the event that memory
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was not properly erased.
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@param[in] uint32_t address. Full address of flash word to be programmed.
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@param[in] uint32_t data.
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*/
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void flash_program_word(uint32_t address, uint32_t data)
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{
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/* Ensure that all flash operations are complete. */
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flash_wait_for_last_operation();
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/* Enable writes to flash. */
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FLASH_CR |= FLASH_CR_PG;
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/* Program the first half of the word. */
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MMIO16(address) = (uint16_t)data;
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/* Wait for the write to complete. */
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flash_wait_for_last_operation();
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/* Enable writes to flash. */
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FLASH_CR |= FLASH_CR_PG;
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/* Program the second half of the word. */
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MMIO16(address + 2) = data >> 16;
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/* Wait for the write to complete. */
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flash_wait_for_last_operation();
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FLASH_SR_BSY));
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if (MEMORY_SIZE_REG > 512)
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flags |= (FLASH_SR2 & (FLASH_SR_PGERR |
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FLASH_SR_EOP |
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FLASH_SR_WRPRTERR |
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FLASH_SR_BSY));
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return flags;
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}
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/*---------------------------------------------------------------------------*/
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@@ -296,6 +220,8 @@ This performs all operations necessary to program a 16 bit word to FLASH memory.
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The program error flag should be checked separately for the event that memory
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was not properly erased.
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Status bit polling is used to detect end of operation.
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@param[in] uint32_t address. Full address of flash half word to be programmed.
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@param[in] uint16_t data.
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*/
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@@ -304,11 +230,17 @@ void flash_program_half_word(uint32_t address, uint16_t data)
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{
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flash_wait_for_last_operation();
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FLASH_CR |= FLASH_CR_PG;
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if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000))
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FLASH_CR2 |= FLASH_CR_PG;
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else FLASH_CR |= FLASH_CR_PG;
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MMIO16(address) = data;
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flash_wait_for_last_operation();
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if ((MEMORY_SIZE_REG > 512) && (address >= FLASH_BASE+0x00080000))
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FLASH_CR2 &= ~FLASH_CR_PG;
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else FLASH_CR &= ~FLASH_CR_PG;
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}
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/*---------------------------------------------------------------------------*/
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@@ -321,19 +253,29 @@ first be fully erased before attempting to program it.
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Note that the page sizes differ between devices. See the reference manual or
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the FLASH programming manual for details.
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@param[in] uint32_t page_address. Full address of flash psge to be erased.
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@param[in] uint32_t page_address. Full address of flash page to be erased.
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*/
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void flash_erase_page(uint32_t page_address)
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{
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flash_wait_for_last_operation();
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FLASH_CR |= FLASH_CR_PER;
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FLASH_AR = page_address;
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FLASH_CR |= FLASH_CR_STRT;
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if ((MEMORY_SIZE_REG > 512) && (page_address >= FLASH_BASE+0x00080000)) {
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FLASH_CR2 |= FLASH_CR_PER;
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FLASH_AR2 = page_address;
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FLASH_CR2 |= FLASH_CR_STRT;
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} else {
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FLASH_CR |= FLASH_CR_PER;
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FLASH_AR = page_address;
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FLASH_CR |= FLASH_CR_STRT;
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}
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flash_wait_for_last_operation();
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FLASH_CR &= ~FLASH_CR_PER;
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if ((MEMORY_SIZE_REG > 512) && (page_address >= FLASH_BASE+0x00080000))
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FLASH_CR2 &= ~FLASH_CR_PER;
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else
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FLASH_CR &= ~FLASH_CR_PER;
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}
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/*---------------------------------------------------------------------------*/
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@@ -352,52 +294,14 @@ void flash_erase_all_pages(void)
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flash_wait_for_last_operation();
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FLASH_CR &= ~FLASH_CR_MER; /* Disable mass erase. */
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/* Repeat for bank 2 */
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FLASH_CR2 |= FLASH_CR_MER;
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FLASH_CR2 |= FLASH_CR_STRT;
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flash_wait_for_last_operation();
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FLASH_CR2 &= ~FLASH_CR_MER;
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Erase All Option Bytes
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This performs all operations necessary to erase the option bytes. These must
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first be fully erased before attempting to program them.
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*/
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void flash_erase_option_bytes(void)
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{
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flash_wait_for_last_operation();
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if ((FLASH_CR & FLASH_CR_OPTWRE) == 0) {
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flash_unlock_option_bytes();
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}
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FLASH_CR |= FLASH_CR_OPTER; /* Enable option byte erase. */
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FLASH_CR |= FLASH_CR_STRT;
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flash_wait_for_last_operation();
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FLASH_CR &= ~FLASH_CR_OPTER; /* Disable option byte erase. */
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}
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/*---------------------------------------------------------------------------*/
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/** @brief Program the Option Bytes
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This performs all operations necessary to program the option bytes.
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The write protect error flag should be checked separately for the event that
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an option byte was not properly erased.
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@param[in] uint32_t address. Full address of option byte to program.
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@param[in] uint16_t data.
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*/
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void flash_program_option_bytes(uint32_t address, uint16_t data)
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{
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flash_wait_for_last_operation();
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if ((FLASH_CR & FLASH_CR_OPTWRE) == 0) {
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flash_unlock_option_bytes();
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}
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FLASH_CR |= FLASH_CR_OPTPG; /* Enable option byte programming. */
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MMIO16(address) = data;
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flash_wait_for_last_operation();
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FLASH_CR &= ~FLASH_CR_OPTPG; /* Disable option byte programming. */
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}
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/**@}*/
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Reference in New Issue
Block a user