Deduplication of flash code for STM32F0 and F1.
Extension of code for STM32F1 to allow for dual bank series XL. Small changes to documentation for F2, F4 and L1 to add a parameter reference. Tested with STM32F103RBT6 (note: tests show that the PG bit must be cleared after programming, otherwise a subsequent erase attempt fails. This has been added to flash_program_half_word for F0 and F1 only. A fix for the other families is not included in this PR.)
This commit is contained in:
Ken Sarkies
committed by
Frantisek Burian
Frantisek Burian
parent
a4d9a41093
commit
0af6d06eda
131
include/libopencm3/stm32/common/flash_common_f01.h
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131
include/libopencm3/stm32/common/flash_common_f01.h
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@@ -0,0 +1,131 @@
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/** @addtogroup flash_defines
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*
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
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* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* For details see:
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* PM0081 Programming manual: STM32F40xxx and STM32F41xxx Flash programming
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* September 2011, Doc ID 018520 Rev 1
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* https://github.com/libopencm3/libopencm3-archive/blob/master/st_micro/DM00023388.pdf
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*/
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/** @cond */
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#ifdef LIBOPENCM3_FLASH_H
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/** @endcond */
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#ifndef LIBOPENCM3_FLASH_COMMON_F01_H
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#define LIBOPENCM3_FLASH_COMMON_F01_H
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/**@{*/
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#include <libopencm3/cm3/common.h>
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/* --- FLASH registers ----------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
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#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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/* Only present in STM32F10x XL series */
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#define FLASH_KEYR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x44)
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#define FLASH_SR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x4C)
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#define FLASH_CR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x50)
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#define FLASH_AR2 MMIO32(FLASH_MEM_INTERFACE_BASE + 0x54)
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/* --- FLASH_OPTION bytes ------------------------------------------------- */
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#define FLASH_OPTION_BYTE(i) MMIO16(INFO_BASE+0x0800 + (i)*2)
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY 7
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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/* --- FLASH_SR values ----------------------------------------------------- */
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#define FLASH_SR_EOP (1 << 5)
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#define FLASH_SR_WRPRTERR (1 << 4)
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#define FLASH_SR_PGERR (1 << 2)
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#define FLASH_SR_BSY (1 << 0)
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_EOPIE (1 << 12)
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#define FLASH_CR_ERRIE (1 << 10)
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#define FLASH_CR_OPTWRE (1 << 9)
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#define FLASH_CR_LOCK (1 << 7)
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#define FLASH_CR_STRT (1 << 6)
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#define FLASH_CR_OPTER (1 << 5)
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#define FLASH_CR_OPTPG (1 << 4)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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/* --- FLASH_OBR values ---------------------------------------------------- */
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#define FLASH_OBR_RDPRT_SHIFT 1
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#define FLASH_OBR_OPTERR (1 << 0)
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/* --- FLASH Keys -----------------------------------------------------------*/
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#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
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#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_set_ws(uint32_t ws);
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void flash_prefetch_buffer_enable(void);
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void flash_prefetch_buffer_disable(void);
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void flash_unlock(void);
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void flash_lock(void);
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void flash_clear_pgerr_flag(void);
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void flash_clear_eop_flag(void);
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void flash_clear_wrprterr_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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uint32_t flash_get_status_flags(void);
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void flash_wait_for_last_operation(void);
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void flash_program_word(uint32_t address, uint32_t data);
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void flash_program_half_word(uint32_t address, uint16_t data);
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void flash_erase_page(uint32_t page_address);
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void flash_erase_all_pages(void);
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void flash_unlock_option_bytes(void);
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void flash_erase_option_bytes(void);
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void flash_program_option_bytes(uint32_t address, uint16_t data);
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END_DECLS
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/**@}*/
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#endif
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/** @cond */
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#else
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#warning "flash_common_f01.h should not be included directly,"
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#warning "only via flash.h"
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#endif
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/** @endcond */
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@@ -37,25 +37,20 @@
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/**@{*/
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/stm32/common/flash_common_f01.h>
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/*****************************************************************************/
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/* Module definitions */
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/*****************************************************************************/
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/* --- FLASH_OPTION values ------------------------------------------------- */
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/*****************************************************************************/
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/* Register definitions */
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/*****************************************************************************/
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
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#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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/** @defgroup flash_options Option Byte Addresses
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@ingroup flash_defines
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@{*/
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#define FLASH_OPTION_BYTE_0 FLASH_OPTION_BYTE(0)
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#define FLASH_OPTION_BYTE_1 FLASH_OPTION_BYTE(1)
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#define FLASH_OPTION_BYTE_2 FLASH_OPTION_BYTE(2)
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#define FLASH_OPTION_BYTE_3 FLASH_OPTION_BYTE(3)
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#define FLASH_OPTION_BYTE_4 FLASH_OPTION_BYTE(4)
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#define FLASH_OPTION_BYTE_5 FLASH_OPTION_BYTE(5)
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/**@}*/
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/*****************************************************************************/
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/* Register values */
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@@ -63,15 +58,14 @@
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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#define FLASH_ACR_LATENCY_SHIFT 0
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#define FLASH_ACR_LATENCY 7
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/** @defgroup flash_latency FLASH Wait States
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@ingroup flash_defines
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@{*/
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#define FLASH_ACR_LATENCY_000_024MHZ 0
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#define FLASH_ACR_LATENCY_024_048MHZ 1
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#define FLASH_ACR_LATENCY_0WS 0
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#define FLASH_ACR_LATENCY_1WS 1
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/**@}*/
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/* --- FLASH_SR values ----------------------------------------------------- */
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@@ -83,16 +77,6 @@
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_OBL_LAUNCH (1 << 13)
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#define FLASH_CR_EOPIE (1 << 12)
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#define FLASH_CR_ERRIE (1 << 10)
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#define FLASH_CR_OPTWRE (1 << 9)
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#define FLASH_CR_LOCK (1 << 7)
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#define FLASH_CR_STRT (1 << 6)
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#define FLASH_CR_OPTER (1 << 5)
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#define FLASH_CR_OPTPG (1 << 4)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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/* --- FLASH_OBR values ---------------------------------------------------- */
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@@ -107,23 +91,19 @@
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#define FLASH_OBR_NRST_STDBY (1 << 10)
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#define FLASH_OBR_NRST_STOP (1 << 9)
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#define FLASH_OBR_WDG_SW (1 << 8)
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#define FLASH_OBR_RDPRT_SHIFT 1
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#define FLASH_OBR_RDPRT (3 << FLASH_OBR_RDPRT_SHIFT)
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#define FLASH_OBR_RDPRT_L0 (0 << FLASH_OBR_RDPRT_SHIFT)
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#define FLASH_OBR_RDPRT_L1 (1 << FLASH_OBR_RDPRT_SHIFT)
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#define FLASH_OBR_RDPRT_L2 (2 << FLASH_OBR_RDPRT_SHIFT)
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#define FLASH_OBR_OPTERR (1 << 0)
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#define FLASH_OBR_RDPRT_L2 (3 << FLASH_OBR_RDPRT_SHIFT)
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/*****************************************************************************/
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/* API definitions */
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/*****************************************************************************/
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/* Read protection option byte protection level setting */
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#define FLASH_RDP_L0 ((uint8_t)0xaa)
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#define FLASH_RDP_L1 ((uint8_t)0xf0) /* any value */
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#define FLASH_RDP_L2 ((uint8_t)0xcc)
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#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
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#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
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/*****************************************************************************/
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/* API Functions */
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@@ -131,15 +111,6 @@
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BEGIN_DECLS
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void flash_prefetch_buffer_enable(void);
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void flash_prefetch_buffer_disable(void);
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void flash_set_ws(uint32_t ws);
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void flash_wait_busy(void);
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void flash_program_u32(uint32_t address, uint32_t data);
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void flash_program_u16(uint32_t address, uint16_t data);
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void flash_erase_page(uint32_t page_address);
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void flash_erase_all_pages(void);
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END_DECLS
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/**@}*/
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@@ -44,27 +44,37 @@
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/**@{*/
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#include <libopencm3/stm32/memorymap.h>
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#include <libopencm3/cm3/common.h>
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#include <libopencm3/stm32/common/flash_common_f01.h>
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/* --- FLASH registers ----------------------------------------------------- */
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/* --- FLASH_OPTION bytes ------------------------------------------------- */
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#define FLASH_ACR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x00)
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#define FLASH_KEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x04)
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#define FLASH_OPTKEYR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x08)
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#define FLASH_SR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x0C)
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#define FLASH_CR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x10)
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#define FLASH_AR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x14)
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#define FLASH_OBR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x1C)
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#define FLASH_WRPR MMIO32(FLASH_MEM_INTERFACE_BASE + 0x20)
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/** @defgroup flash_options Option Byte Addresses
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@ingroup flash_defines
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@{*/
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#define FLASH_OPTION_BYTE_0 FLASH_OPTION_BYTE(0)
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#define FLASH_OPTION_BYTE_1 FLASH_OPTION_BYTE(1)
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#define FLASH_OPTION_BYTE_2 FLASH_OPTION_BYTE(2)
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#define FLASH_OPTION_BYTE_3 FLASH_OPTION_BYTE(3)
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#define FLASH_OPTION_BYTE_4 FLASH_OPTION_BYTE(4)
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#define FLASH_OPTION_BYTE_5 FLASH_OPTION_BYTE(5)
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#define FLASH_OPTION_BYTE_6 FLASH_OPTION_BYTE(6)
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#define FLASH_OPTION_BYTE_7 FLASH_OPTION_BYTE(7)
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/**@}*/
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/*****************************************************************************/
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/* Register values */
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/*****************************************************************************/
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/* --- FLASH_ACR values ---------------------------------------------------- */
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#define FLASH_ACR_PRFTBS (1 << 5)
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#define FLASH_ACR_PRFTBE (1 << 4)
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#define FLASH_ACR_HLFCYA (1 << 3)
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/** @defgroup flash_latency FLASH Wait States
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@ingroup flash_defines
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@{*/
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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#define FLASH_ACR_LATENCY_2WS 0x02
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/**@}*/
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#define FLASH_ACR_HLFCYA (1 << 3)
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/* --- FLASH_SR values ----------------------------------------------------- */
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@@ -75,17 +85,6 @@
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/* --- FLASH_CR values ----------------------------------------------------- */
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#define FLASH_CR_EOPIE (1 << 12)
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#define FLASH_CR_ERRIE (1 << 10)
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#define FLASH_CR_OPTWRE (1 << 9)
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#define FLASH_CR_LOCK (1 << 7)
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#define FLASH_CR_STRT (1 << 6)
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#define FLASH_CR_OPTER (1 << 5)
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#define FLASH_CR_OPTPG (1 << 4)
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#define FLASH_CR_MER (1 << 2)
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#define FLASH_CR_PER (1 << 1)
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#define FLASH_CR_PG (1 << 0)
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/* --- FLASH_OBR values ---------------------------------------------------- */
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/* FLASH_OBR[25:18]: Data1 */
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@@ -93,40 +92,27 @@
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#define FLASH_OBR_NRST_STDBY (1 << 4)
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#define FLASH_OBR_NRST_STOP (1 << 3)
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#define FLASH_OBR_WDG_SW (1 << 2)
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#define FLASH_OBR_RDPRT (1 << 1)
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#define FLASH_OBR_OPTERR (1 << 0)
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#define FLASH_OBR_RDPRT_EN (1 << FLASH_OBR_RDPRT_SHIFT)
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/* --- FLASH Keys -----------------------------------------------------------*/
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/*****************************************************************************/
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/* API definitions */
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/*****************************************************************************/
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/* Read protection option byte protection enable key */
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#define FLASH_RDP_KEY ((uint16_t)0x00a5)
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#define FLASH_KEYR_KEY1 ((uint32_t)0x45670123)
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#define FLASH_KEYR_KEY2 ((uint32_t)0xcdef89ab)
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/* --- Function prototypes ------------------------------------------------- */
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BEGIN_DECLS
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void flash_prefetch_buffer_enable(void);
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void flash_prefetch_buffer_disable(void);
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void flash_halfcycle_enable(void);
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void flash_halfcycle_disable(void);
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void flash_set_ws(uint32_t ws);
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void flash_unlock(void);
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void flash_lock(void);
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void flash_clear_pgerr_flag(void);
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void flash_clear_eop_flag(void);
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void flash_clear_wrprterr_flag(void);
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void flash_clear_bsy_flag(void);
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void flash_clear_status_flags(void);
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uint32_t flash_get_status_flags(void);
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void flash_unlock_option_bytes(void);
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void flash_erase_all_pages(void);
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void flash_erase_page(uint32_t page_address);
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void flash_program_word(uint32_t address, uint32_t data);
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void flash_program_half_word(uint32_t address, uint16_t data);
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void flash_wait_for_last_operation(void);
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void flash_erase_option_bytes(void);
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void flash_program_option_bytes(uint32_t address, uint16_t data);
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void flash_unlock_upper(void);
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void flash_lock_upper(void);
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void flash_clear_pgerr_flag_upper(void);
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void flash_clear_eop_flag_upper(void);
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void flash_clear_wrprterr_flag_upper(void);
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void flash_clear_bsy_flag_upper(void);
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END_DECLS
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@@ -67,8 +67,12 @@
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#define FLASH_ACR_SLEEPPD (1 << 3)
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#define FLASH_ACR_ACC64 (1 << 2)
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#define FLASH_ACR_PRFTEN (1 << 1)
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/** @defgroup flash_latency FLASH Wait States
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@ingroup flash_defines
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@{*/
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#define FLASH_ACR_LATENCY_0WS 0x00
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#define FLASH_ACR_LATENCY_1WS 0x01
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/**@}*/
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/* --- FLASH_PECR values. Program/erase control register */
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#define FLASH_PECR_OBL_LAUNCH (1 << 18)
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