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stm32: i2c-v1: Fixed a typo in i2c_read7_v1 and i2c_write7_v1

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Replaced & with &&
Wait for all three bits to be set - SB, MSL, and BUSY.

Old code worked by chance, use booleans to correctly convey intent.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
This commit is contained in:
Dima Barsky
2020-01-10 20:45:21 +00:00
committed by Karl Palsson
parent 946c1cbc48
commit 08c5f2a1fb
1 changed files with 8 additions and 6 deletions
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14
lib/stm32/common/i2c_common_v1.c
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@@ -471,9 +471,10 @@ static void i2c_write7_v1(uint32_t i2c, int addr, uint8_t *data, size_t n)
i2c_send_start(i2c);
/* Wait for master mode selected */
while (!((I2C_SR1(i2c) & I2C_SR1_SB)
& (I2C_SR2(i2c) & (I2C_SR2_MSL | I2C_SR2_BUSY))));
/* Wait for the end of the start condition, master mode selected, and BUSY bit set */
while ( !( (I2C_SR1(i2c) & I2C_SR1_SB)
&& (I2C_SR2(i2c) & I2C_SR2_MSL)
&& (I2C_SR2(i2c) & I2C_SR2_BUSY) ));
i2c_send_7bit_address(i2c, addr, I2C_WRITE);
@@ -494,9 +495,10 @@ static void i2c_read7_v1(uint32_t i2c, int addr, uint8_t *res, size_t n)
i2c_send_start(i2c);
i2c_enable_ack(i2c);
/* Wait for master mode selected */
while (!((I2C_SR1(i2c) & I2C_SR1_SB)
& (I2C_SR2(i2c) & (I2C_SR2_MSL | I2C_SR2_BUSY))));
/* Wait for the end of the start condition, master mode selected, and BUSY bit set */
while ( !( (I2C_SR1(i2c) & I2C_SR1_SB)
&& (I2C_SR2(i2c) & I2C_SR2_MSL)
&& (I2C_SR2(i2c) & I2C_SR2_BUSY) ));
i2c_send_7bit_address(i2c, addr, I2C_READ);