CAN: Cosmetics and coding-style fixes.
This commit is contained in:
226
lib/can.c
226
lib/can.c
@@ -18,15 +18,14 @@
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*/
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#include <libopenstm32/can.h>
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#include <libopenstm32/rcc.h>
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void can_reset(u32 canport)
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{
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if(canport == CAN1){
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if (canport == CAN1) {
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rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN1RST);
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rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN1RST);
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}else{
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} else {
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rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN2RST);
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rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_CAN2RST);
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}
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@@ -40,197 +39,162 @@ int can_init(u32 canport,
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u32 can_msr_inak_timeout = 0x0000FFFF;
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int ret = 0;
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/* Exit from sleep mode */
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/* Exit from sleep mode. */
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CAN_MCR(canport) &= ~CAN_MCR_SLEEP;
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/* Request initialization "enter" */
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/* Request initialization "enter". */
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CAN_MCR(canport) |= CAN_MCR_INRQ;
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/* Wait for acknowledge */
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/* Wait for acknowledge. */
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while ((wait_ack != can_msr_inak_timeout) &&
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((CAN_MSR(canport) & CAN_MSR_INAK) != CAN_MSR_INAK)) {
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((CAN_MSR(canport) & CAN_MSR_INAK) != CAN_MSR_INAK)) {
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wait_ack++;
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}
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/* Check the acknowledge */
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/* Check the acknowledge. */
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if ((CAN_MSR(canport) & CAN_MSR_INAK) != CAN_MSR_INAK) {
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ret = 1;
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} else {
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/* set the automatic bus-off management */
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if (ttcm) {
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/* Set the automatic bus-off management. */
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if (ttcm)
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CAN_MCR(canport) |= CAN_MCR_TTCM;
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} else {
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else
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CAN_MCR(canport) &= ~CAN_MCR_TTCM;
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}
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if (abom) {
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if (abom)
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CAN_MCR(canport) |= CAN_MCR_ABOM;
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} else {
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else
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CAN_MCR(canport) &= ~CAN_MCR_ABOM;
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}
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if (awum) {
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if (awum)
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CAN_MCR(canport) |= CAN_MCR_AWUM;
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} else {
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else
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CAN_MCR(canport) &= ~CAN_MCR_AWUM;
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}
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if (nart) {
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if (nart)
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CAN_MCR(canport) |= CAN_MCR_NART;
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} else {
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else
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CAN_MCR(canport) &= ~CAN_MCR_NART;
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}
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if (rflm) {
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if (rflm)
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CAN_MCR(canport) |= CAN_MCR_RFLM;
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} else {
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else
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CAN_MCR(canport) &= ~CAN_MCR_RFLM;
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}
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if (txfp) {
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if (txfp)
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CAN_MCR(canport) |= CAN_MCR_TXFP;
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} else {
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else
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CAN_MCR(canport) &= ~CAN_MCR_TXFP;
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}
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/* Set bit timings */
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CAN_BTR(canport) = sjw |
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ts2 |
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ts1 |
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/* Set bit timings. */
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CAN_BTR(canport) = sjw | ts2 | ts1 |
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(u32)(CAN_BTR_BRP_MASK & (brp - 1));
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/* Request initialization "leave" */
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/* Request initialization "leave". */
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CAN_MCR(canport) &= ~CAN_MCR_INRQ;
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/* Wait for acknowledge */
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/* Wait for acknowledge. */
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wait_ack = 0x00000000;
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while ((wait_ack != can_msr_inak_timeout) &&
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((CAN_MSR(canport) & CAN_MSR_INAK) == CAN_MSR_INAK)) {
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((CAN_MSR(canport) & CAN_MSR_INAK) == CAN_MSR_INAK)) {
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wait_ack++;
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}
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if ((CAN_MSR(canport) & CAN_MSR_INAK) == CAN_MSR_INAK) {
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if ((CAN_MSR(canport) & CAN_MSR_INAK) == CAN_MSR_INAK)
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ret = 1;
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}
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}
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return ret;
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}
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void can_filter_init(u32 canport, u32 nr, bool scale_32bit, bool id_list_mode,
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u32 fr1, u32 fr2,
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u32 fifo, bool enable)
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u32 fr1, u32 fr2, u32 fifo, bool enable)
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{
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u32 filter_select_bit = 0x00000001 << nr;
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/* Request initialization "enter" */
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/* Request initialization "enter". */
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CAN_FMR(canport) |= CAN_FMR_FINIT;
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/* Deactivate the filter */
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/* Deactivate the filter. */
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CAN_FA1R(canport) &= ~filter_select_bit;
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if (scale_32bit) {
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/* Set 32-bit scale for the filter */
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/* Set 32-bit scale for the filter. */
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CAN_FS1R(canport) |= filter_select_bit;
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} else {
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/* Set 16-bit scale for the filter */
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/* Set 16-bit scale for the filter. */
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CAN_FS1R(canport) &= ~filter_select_bit;
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}
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if (id_list_mode) {
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/* Set filter mode to id list mode */
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/* Set filter mode to ID list mode. */
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CAN_FM1R(canport) |= filter_select_bit;
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} else {
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/* Set filter mode to id/mask mode */
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/* Set filter mode to id/mask mode. */
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CAN_FM1R(canport) &= ~filter_select_bit;
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}
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/* Set the first filter register */
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/* Set the first filter register. */
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CAN_FiR1(canport, nr) = fr1;
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/* Set the second filter register */
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/* Set the second filter register. */
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CAN_FiR2(canport, nr) = fr2;
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if (fifo) {
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/* Select FIFO1 as filter assignement */
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CAN_FFA1R(canport) |= filter_select_bit;
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} else {
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/* Select FIFO0 as filter assignement */
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CAN_FFA1R(canport) &= ~filter_select_bit;
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}
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/* Select FIFO0 or FIFO1 as filter assignement. */
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if (fifo)
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CAN_FFA1R(canport) |= filter_select_bit; /* FIFO1 */
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else
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CAN_FFA1R(canport) &= ~filter_select_bit; /* FIFO0 */
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if (enable) {
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/* Activate the filter */
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CAN_FA1R(canport) |= filter_select_bit;
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}
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if (enable)
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CAN_FA1R(canport) |= filter_select_bit; /* Activate filter. */
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/* Request initialization "leave" */
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/* Request initialization "leave". */
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CAN_FMR(canport) &= ~CAN_FMR_FINIT;
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}
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void can_filter_id_mask_16bit_init(u32 canport, u32 nr,
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u16 id1, u16 mask1,
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u16 id2, u16 mask2,
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u32 fifo, bool enable)
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void can_filter_id_mask_16bit_init(u32 canport, u32 nr, u16 id1, u16 mask1,
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u16 id2, u16 mask2, u32 fifo, bool enable)
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{
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can_filter_init(canport, nr, false, false,
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((u32)id1 << 16) | (u32)mask1,
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((u32)id2 << 16) | (u32)mask2,
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fifo, enable);
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((u32)id2 << 16) | (u32)mask2, fifo, enable);
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}
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void can_filter_id_mask_32bit_init(u32 canport, u32 nr,
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u32 id, u32 mask,
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void can_filter_id_mask_32bit_init(u32 canport, u32 nr, u32 id, u32 mask,
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u32 fifo, bool enable)
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{
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can_filter_init(canport, nr, true, false,
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id, mask,
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fifo, enable);
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can_filter_init(canport, nr, true, false, id, mask, fifo, enable);
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}
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void can_filter_id_list_16bit_init(u32 canport, u32 nr,
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u16 id1, u16 id2,
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u16 id3, u16 id4,
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u32 fifo, bool enable)
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void can_filter_id_list_16bit_init(u32 canport, u32 nr, u16 id1, u16 id2,
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u16 id3, u16 id4, u32 fifo, bool enable)
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{
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can_filter_init(canport, nr, false, true,
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((u32)id1 << 16) | (u32)id2,
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((u32)id3 << 16) | (u32)id4,
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fifo, enable);
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((u32)id3 << 16) | (u32)id4, fifo, enable);
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}
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void can_filter_id_list_32bit_init(u32 canport, u32 nr,
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u32 id1, u32 id2,
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void can_filter_id_list_32bit_init(u32 canport, u32 nr, u32 id1, u32 id2,
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u32 fifo, bool enable)
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{
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can_filter_init(canport, nr, true, true,
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id1, id2,
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fifo, enable);
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can_filter_init(canport, nr, true, true, id1, id2, fifo, enable);
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}
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void can_enable_irq(u32 canport, u32 irq)
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{
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CAN_IER(canport) |= irq;
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}
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void can_disable_irq(u32 canport, u32 irq)
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{
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CAN_IER(canport) &= ~irq;
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}
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int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
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{
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int ret = 0;
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int ret = 0, i;
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u32 mailbox = 0;
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int i;
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if ((CAN_TSR(canport) & CAN_TSR_TME0) == CAN_TSR_TME0) {
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ret = 0;
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@@ -245,42 +209,39 @@ int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
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ret = -1;
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}
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if (ret != -1) { /* check if we have an empty mailbox */
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if (ret != -1) { /* Check if we have an empty mailbox. */
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if (ext) {
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/* Set extended id */
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/* Set extended ID. */
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CAN_TIxR(canport, mailbox) |= id << CAN_TIxR_EXID_SHIFT;
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/* Set extended id indicator bit */
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/* Set extended ID indicator bit. */
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CAN_TIxR(canport, mailbox) |= CAN_TIxR_IDE;
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} else {
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/* Set standard id */
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/* Set standard ID. */
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CAN_TIxR(canport, mailbox) |= id << CAN_TIxR_STID_SHIFT;
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/* Unset extended id indicator bit */
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/* Unset extended ID indicator bit. */
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CAN_TIxR(canport, mailbox) &= ~CAN_TIxR_IDE;
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}
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if (rtr) {
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/* Set remote transmission request bit */
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CAN_TIxR(canport, mailbox) |= CAN_TIxR_RTR;
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} else {
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/* Unset remote transmission request bit */
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CAN_TIxR(canport, mailbox) &= ~CAN_TIxR_RTR;
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}
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/* Set/clear remote transmission request bit. */
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if (rtr)
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CAN_TIxR(canport, mailbox) |= CAN_TIxR_RTR; /* Set */
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else
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CAN_TIxR(canport, mailbox) &= ~CAN_TIxR_RTR; /* Clear */
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/* Set the DLC */
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/* Set the DLC. */
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CAN_TDTxR(canport, mailbox) &= 0xFFFFFFFF0;
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CAN_TDTxR(canport, mailbox) |= length & CAN_TDTxR_DLC_MASK;
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/* Set the data */
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/* Set the data. */
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CAN_TDLxR(canport, mailbox) = 0;
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CAN_TDHxR(canport, mailbox) = 0;
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for (i = 0; (i < 4) && (i < length); i++) {
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for (i = 0; (i < 4) && (i < length); i++)
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CAN_TDLxR(canport, mailbox) |= (u32)data[i] << (8 * i);
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}
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for (i = 4; (i < 8) && (i < length); i++) {
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CAN_TDHxR(canport, mailbox) |= (u32)data[i] << (8 * (i-4));
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}
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for (i = 4; (i < 8) && (i < length); i++)
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CAN_TDHxR(canport, mailbox)
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|= (u32)data[i] << (8 * (i - 4));
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/* Request transmission */
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/* Request transmission. */
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CAN_TIxR(canport, mailbox) |= CAN_TIxR_TXRQ;
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}
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@@ -289,64 +250,57 @@ int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
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void can_fifo_release(u32 canport, u8 fifo)
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{
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if (fifo == 0) {
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if (fifo == 0)
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CAN_RF0R(canport) |= CAN_RF1R_RFOM1;
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} else {
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else
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CAN_RF1R(canport) |= CAN_RF1R_RFOM1;
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}
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}
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void can_receive(u32 canport, u8 fifo, bool release,
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u32 *id, bool *ext, bool *rtr, u32 *fmi,
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u8 *length, u8 *data)
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void can_receive(u32 canport, u8 fifo, bool release, u32 *id, bool *ext,
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bool *rtr, u32 *fmi, u8 *length, u8 *data)
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{
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u32 fifo_id = 0;
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int i;
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if (fifo == 0) {
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if (fifo == 0)
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fifo_id = CAN_FIFO0;
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} else {
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else
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fifo_id = CAN_FIFO1;
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}
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/* get type of CAN id and CAN id */
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/* Get type of CAN ID and CAN ID. */
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if (CAN_RIxR(canport, fifo_id) & CAN_RIxR_IDE) {
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*ext = true;
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/* Get extended CAN id */
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/* Get extended CAN ID. */
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*id = ((CAN_RIxR(canport, fifo_id) & CAN_RIxR_EXID_MASK) >
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CAN_RIxR_EXID_SHIFT);
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} else {
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*ext = false;
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/* Get standard CAN id */
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/* Get standard CAN ID. */
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*id = ((CAN_RIxR(canport, fifo_id) & CAN_RIxR_STID_MASK) >
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CAN_RIxR_STID_SHIFT);
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}
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/* get request transmit flag */
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if (CAN_RIxR(canport, fifo_id) & CAN_RIxR_RTR) {
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/* Get request transmit flag. */
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if (CAN_RIxR(canport, fifo_id) & CAN_RIxR_RTR)
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*rtr = true;
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} else {
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else
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*rtr = false;
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}
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/* get filter match id */
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/* Get filter match ID. */
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*fmi = ((CAN_RDTxR(canport, fifo_id) & CAN_RDTxR_FMI_MASK) >
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CAN_RDTxR_FMI_SHIFT);
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/* get data length */
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/* Get data length. */
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*length = CAN_RDTxR(canport, fifo_id) & CAN_RDTxR_DLC_MASK;
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/* get data */
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for (i=0; (i < 4) && (i < *length); i++) {
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/* Get data. */
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for (i = 0; (i < 4) && (i < *length); i++)
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data[i] = (CAN_RDLxR(canport, fifo_id) >> (8 * i)) & 0xFF;
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}
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for (i=4; (i < 8) && (i < *length); i++) {
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for (i = 4; (i < 8) && (i < *length); i++)
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data[i] = (CAN_RDHxR(canport, fifo_id) >> (8 * (i - 4))) & 0xFF;
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}
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/* release the fifo */
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if (release) {
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/* Release the FIFO. */
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if (release)
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can_fifo_release(CAN1, 0);
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}
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}
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