diff --git a/include/libopencm3/stm32/common/crypto_common_f24.h b/include/libopencm3/stm32/common/crypto_common_f24.h new file mode 100644 index 00000000..538c012e --- /dev/null +++ b/include/libopencm3/stm32/common/crypto_common_f24.h @@ -0,0 +1,291 @@ +/** @addtogroup crypto_defines + * + * @warning The CRYP subsystem is present only in a limited set of devices, + * see next section for list of supported devices. + * + * @section crypto_api_supported Supported devices + * + * - STM32F205 + * - STM32F207 + * - STM32F215 + * - STM32F217 + * - STM32F405 + * - STM32F407 + * - STM32F415 + * - STM32F417 (tested) + * - STM32F427 + * - STM32F437 + * + * @section crypto_api_theory Theory of operation + * + * + * + * @section crypto_api_basic Basic handling API + * + * + * @b Example @b 1: Blocking mode + * + * @code + * //[enable-clocks] + * crypto_set_key(CRYPTO_KEY_128BIT,key); + * crypto_set_iv(iv); // only in CBC or CTR mode + * crypto_set_datatype(CRYPTO_DATA_16BIT); + * crypto_set_algorithm(ENCRYPT_AES_ECB); + * crypto_start(); + * foreach(block in blocks) + * crypto_process_block(plaintext,ciphertext,blocksize); + * crypto_stop(); + * @endcode + * + * @section crypto_api_interrupt Interrupt supported handling API + * + * @warning This operation mode is currently not supported. + * + * @b Example @b 2: Interrupt mode + * + * @code + * //[enable-clocks] + * crypto_set_key(CRYPTO_KEY_128BIT,key); + * crypto_set_iv(iv); // only in CBC or CTR mode + * crypto_set_datatype(CRYPTO_DATA_16BIT); + * crypto_set_algorithm(ENCRYPT_AES_ECB); + * crypto_start(); + * [... API to be described later ...] + * crypto_stop(); + * @endcode + * + * @section crypto_api_dma DMA handling API + * + * @warning This operation mode is currently not supported. + * + * @b Example @b 3: DMA mode + * + * @code + * //[enable-clocks] + * crypto_set_key(CRYPTO_KEY_128BIT,key); + * crypto_set_iv(iv); // only in CBC or CTR mode + * crypto_set_datatype(CRYPTO_DATA_16BIT); + * crypto_set_algorithm(ENCRYPT_AES_ECB); + * crypto_start(); + * [... API to be described later ...] + * crypto_stop(); + * @endcode + */ + +/* + * This file is part of the libopencm3 project. + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA CRYP.H +The order of header inclusion is important. cryp.h includes the device +specific memorymap.h header before including this header file.*/ + +/** @cond */ +#ifdef LIBOPENCM3_CRYPTO_H +/** @endcond */ + +#ifndef LIBOPENCM3_CRYPTO_COMMON_F24_H +#define LIBOPENCM3_CRYPTO_COMMON_F24_H + +#include + +/**@{*/ + +/* --- CRYP registers ------------------------------------------------------ */ +/** @defgroup crypto_registers_gen Registers (Generic) + * + * @brief Register access to the CRYP controller. (All chips) + * + * @ingroup crypto_defines + */ +/**@{*/ + +#define CRYP CRYP_BASE + +/* CRYP Control Register (CRYP_CR) */ +#define CRYP_CR MMIO32(CRYP_BASE + 0x00) + +/* CRYP Status Register (CRYP_SR) */ +#define CRYP_SR MMIO32(CRYP_BASE + 0x04) + +/* CRYP Data Input Register (CRYP_DIN) */ +#define CRYP_DIN MMIO32(CRYP_BASE + 0x08) + +/** CRYP Data Output Register (CRYP_DOUT) @see blablabla */ +#define CRYP_DOUT MMIO32(CRYP_BASE + 0x0C) + +/* CRYP DMA Control Register (CRYP_DMACR) */ +#define CRYP_DMACR MMIO32(CRYP_BASE + 0x10) + +/* CRYP Interrupt mask set/clear register (CRYP_IMSCR) */ +#define CRYP_IMSCR MMIO32(CRYP_BASE + 0x14) + +/* CRYP Raw Interrupt status register (CRYP_RISR) */ +#define CRYP_RISR MMIO32(CRYP_BASE + 0x18) + +/* CRYP Masked Interrupt status register (CRYP_MISR) */ +#define CRYP_MISR MMIO32(CRYP_BASE + 0x1C) + +/* CRYP Key registers (CRYP_KxLR) x=0..3 */ +#define CRYP_KR(i) MMIO64(CRYP_BASE + 0x20 + (i) * 8) + +/* CRYP Initialization Vector Registers (CRYP_IVxLR) x=0..1 */ +#define CRYP_IVR(i) MMIO32(CRYP_BASE + 0x40 + (i) * 8) + +/* --- CRYP_CR values ------------------------------------------------------ */ + +/* ALGODIR: Algorithm direction */ +#define CRYP_CR_ALGODIR (1 << 2) + +/* ALGOMODE: Algorithm mode */ +#define CRYP_CR_ALGOMODE_SHIFT 3 +#define CRYP_CR_ALGOMODE (7 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_TDES_ECB (0 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_TDES_CBC (1 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_DES_ECB (2 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_DES_CBC (3 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_AES_ECB (4 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_AES_CBC (5 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_AES_CTR (6 << CRYP_CR_ALGOMODE_SHIFT) +#define CRYP_CR_ALGOMODE_AES_PREP (7 << CRYP_CR_ALGOMODE_SHIFT) + +/* DATATYPE: Data type selection */ +#define CRYP_CR_DATATYPE_SHIFT 6 +#define CRYP_CR_DATATYPE (3 << CRYP_CR_DATATYPE_SHIFT) +#define CRYP_CR_DATATYPE_32 (0 << CRYP_CR_DATATYPE_SHIFT) +#define CRYP_CR_DATATYPE_16 (1 << CRYP_CR_DATATYPE_SHIFT) +#define CRYP_CR_DATATYPE_8 (2 << CRYP_CR_DATATYPE_SHIFT) +#define CRYP_CR_DATATYPE_BIT (3 << CRYP_CR_DATATYPE_SHIFT) + +/* KEYSIZE: Key size selection (AES mode only)*/ +#define CRYP_CR_KEYSIZE_SHIFT 8 +#define CRYP_CR_KEYSIZE (3 << CRYP_CR_KEYSIZE_SHIFT) +#define CRYP_CR_KEYSIZE_128 (0 << CRYP_CR_KEYSIZE_SHIFT) +#define CRYP_CR_KEYSIZE_192 (1 << CRYP_CR_KEYSIZE_SHIFT) +#define CRYP_CR_KEYSIZE_256 (2 << CRYP_CR_KEYSIZE_SHIFT) + +/* FFLUSH: FIFO Flush */ +#define CRYP_CR_FFLUSH (1 << 14) + +/* CRYPEN: Cryptographic processor enable*/ +#define CRYP_CR_CRYPEN (1 << 15) + +/* --- CRYP_SR values ------------------------------------------------------ */ + +/* IFEM: Input FIFO empty */ +#define CRYP_SR_IFEM (1 << 0) + +/* IFNF: Input FIFO not full */ +#define CRYP_SR_IFNF (1 << 1) + +/* OFNE: Output FIFO not empty */ +#define CRYP_SR_OFNE (1 << 2) + +/* OFFU: Output FIFO full */ +#define CRYP_SR_OFFU (1 << 3) + +/* BUSY: Busy bit */ +#define CRYP_SR_BUSY (1 << 4) + +/* --- CRYP_DMACR values --------------------------------------------------- */ + +/* DIEN: DMA input enable */ +#define CRYP_DMACR_DIEN (1 << 0) + +/* DOEN: DMA output enable */ +#define CRYP_DMACR_DOEN (1 << 1) + +/* --- CRYP_IMSCR values --------------------------------------------------- */ + +/* INIM: Input FIFO service interrupt mask */ +#define CRYP_IMSCR_INIM (1 << 0) + +/* OUTIM: Output FIFO service interrupt mask */ +#define CRYP_IMSCR_OUTIM (1 << 1) + +/* --- CRYP_RISR values ---------------------------------------------------- */ + +/* INRIS: Input FIFO service raw interrupt status */ +#define CRYP_RISR_INRIS (1 << 0) + +/* OUTRIS: Output FIFO service raw data */ +#define CRYP_RISR_OUTRIS (1 << 0) + +/* --- CRYP_MISR values ---------------------------------------------------- */ + +/* INMIS: Input FIFO service masked interrupt status */ +#define CRYP_MISR_INMIS (1 << 0) + +/* OUTMIS: Output FIFO service masked interrupt status */ +#define CRYP_MISR_OUTMIS (1 << 0) + +/**@}*/ + +/** @defgroup crypto_api_gen API (Generic) + * + * @brief API for the CRYP controller + * + * @ingroup crypto_defines + */ +/**@{*/ + +typedef enum { + ENCRYPT_TDES_ECB = CRYP_CR_ALGOMODE_TDES_ECB, + ENCRYPT_TDES_CBC = CRYP_CR_ALGOMODE_TDES_CBC, + ENCRYPT_DES_ECB = CRYP_CR_ALGOMODE_DES_ECB, + ENCRYPT_DES_CBC = CRYP_CR_ALGOMODE_DES_CBC, + ENCRYPT_AES_ECB = CRYP_CR_ALGOMODE_AES_ECB, + ENCRYPT_AES_CBC = CRYP_CR_ALGOMODE_AES_CBC, + ENCRYPT_AES_CTR = CRYP_CR_ALGOMODE_AES_CTR, + DECRYPT_TDES_ECB = CRYP_CR_ALGOMODE_TDES_ECB | CRYP_CR_ALGODIR, + DECRYPT_TDES_CBC = CRYP_CR_ALGOMODE_TDES_CBC | CRYP_CR_ALGODIR, + DECRYPT_DES_ECB = CRYP_CR_ALGOMODE_DES_ECB | CRYP_CR_ALGODIR, + DECRYPT_DES_CBC = CRYP_CR_ALGOMODE_DES_CBC | CRYP_CR_ALGODIR, + DECRYPT_AES_ECB = CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR, + DECRYPT_AES_CBC = CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR, + DECRYPT_AES_CTR = CRYP_CR_ALGOMODE_AES_CTR, /* XOR is same ENC as DEC */ +} crypto_mode_t; +typedef enum { + CRYPTO_KEY_128BIT = 0, + CRYPTO_KEY_192BIT, + CRYPTO_KEY_256BIT, +} crypto_keysize_t; +typedef enum { + + CRYPTO_DATA_32BIT = 0, + CRYPTO_DATA_16BIT, + CRYPTO_DATA_8BIT, + CRYPTO_DATA_BIT, +} crypto_datatype_t; + +BEGIN_DECLS +void crypto_wait_busy(void); +void crypto_set_key(crypto_keysize_t keysize, uint64_t key[]); +void crypto_set_iv(uint64_t iv[]); +void crypto_set_datatype(crypto_datatype_t datatype); +void crypto_set_algorithm(crypto_mode_t mode); +void crypto_start(void); +void crypto_stop(void); +uint32_t crypto_process_block(uint32_t * inp, uint32_t * outp, uint32_t length); +END_DECLS +/**@}*/ +/**@}*/ +#endif +/** @cond */ +#else +#warning "crypto_common_f24.h should not be included explicitly, only via crypto.h" +#endif +/** @endcond */ diff --git a/include/libopencm3/stm32/crypto.h b/include/libopencm3/stm32/crypto.h new file mode 100644 index 00000000..419668e9 --- /dev/null +++ b/include/libopencm3/stm32/crypto.h @@ -0,0 +1,27 @@ +/* This provides unification of code over STM32F subfamilies */ + +/* + * This file is part of the libopencm3 project. + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#if defined(STM32F2) +# include +#elif defined(STM32F4) +# include +#else +# error "CRYPTO processor is supported only" \ + "in stm32f2xx, stm32f41xx, stm32f42xx and stm32f43xx family." +#endif diff --git a/include/libopencm3/stm32/f2/crypto.h b/include/libopencm3/stm32/f2/crypto.h new file mode 100644 index 00000000..0850ad28 --- /dev/null +++ b/include/libopencm3/stm32/f2/crypto.h @@ -0,0 +1,38 @@ +/** @defgroup crypto_defines CRYPTO Defines + * + * @brief Defined Constants and Types for the STM32F2xx CRYP Controller + * + * @ingroup STM32F2xx_defines + * + * @version 1.0.0 + * + * @date 17 Jun 2013 + * + * LGPL License Terms @ref lgpl_license + */ + +/* + * This file is part of the libopencm3 project. + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LIBOPENCM3_CRYPTO_H +#define LIBOPENCM3_CRYPTO_H + +#include +#include +#include + +#endif diff --git a/include/libopencm3/stm32/f2/memorymap.h b/include/libopencm3/stm32/f2/memorymap.h index c6d7f814..fd40b457 100644 --- a/include/libopencm3/stm32/f2/memorymap.h +++ b/include/libopencm3/stm32/f2/memorymap.h @@ -118,7 +118,9 @@ #define USB_OTG_FS_BASE (PERIPH_BASE_AHB2 + 0x0000) /* PERIPH_BASE_AHB2 + 0x40000 (0x5004 0000 - 0x5004 FFFF): Reserved */ #define DCMI_BASE (PERIPH_BASE_AHB2 + 0x50000) -/* PERIPH_BASE_AHB2 + 0x50400 (0x5005 0400 - 0x5006 07FF): Reserved */ +/* PERIPH_BASE_AHB2 + 0x50400 (0x5005 0400 - 0x5005 FFFF): Reserved */ +#define CRYP_BASE (PERIPH_BASE_AHB2 + 0x60000) +#define HASH_BASE (PERIPH_BASE_AHB2 + 0x60400) #define RNG_BASE (PERIPH_BASE_AHB2 + 0x60800) /* PERIPH_BASE_AHB2 + 0x61000 (0x5006 1000 - 0x5FFF FFFF): Reserved */ diff --git a/include/libopencm3/stm32/f4/crypto.h b/include/libopencm3/stm32/f4/crypto.h new file mode 100644 index 00000000..985a05b3 --- /dev/null +++ b/include/libopencm3/stm32/f4/crypto.h @@ -0,0 +1,98 @@ +/** @defgroup crypto_defines CRYPTO Defines + * + * @brief Defined constants and Types for the STM32F4xx Crypto Coprocessor + * + * @ingroup STM32F4xx_defines + * + * @version 1.0.0 + * + * @date 22 Jun 2013 + * + * LGPL License Terms @ref lgpl_license + */ + +/* + * This file is part of the libopencm3 project. + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LIBOPENCM3_CRYPTO_H +#define LIBOPENCM3_CRYPTO_H + +#include +#include + +/**@{*/ + +/* --- CRYP registers ------------------------------------------------------ */ +/** @defgroup crypto_defines_registers Registers (for F42xx or F43xx only) + * + * @brief Register access to the CRYP controller. Registers for F42xx and 43xx + * + * @ingroup crypto_defines + */ +/**@{*/ + +/* CRYP_CSGCMCCMxR: Crypto context registers CCM mode, i=0-7*/ +#define CRYP_CSGCMCCMR(i) MMIO32(CRYP_BASE + 0x50 + (i) * 4) + +/* CRYP_CSGCMxR: Crypto context registers all modes, i=0-7*/ +#define CRYP_CSGCMR(i) MMIO32(CRYP_BASE + 0x70 + (i) * 4) + +/* --- CRYP_CR values ------------------------------------------------------ */ + +/* Only for part STM32F42xx and STM32F43xx: */ + +/* GCM_CMPH: GCM or CCM phase state */ +#define CRYP_CR_GCM_CMPH_SHIFT 16 +#define CRYP_CR_GCM_CMPH (3 << CRYP_CR_GCM_CMPH_SHIFT) +#define CRYP_CR_GCM_CMPH_INIT (0 << CRYP_CR_GCM_CMPH_SHIFT) +#define CRYP_CR_GCM_CMPH_HEADER (1 << CRYP_CR_GCM_CMPH_SHIFT) +#define CRYP_CR_GCM_CMPH_PAYLOAD (2 << CRYP_CR_GCM_CMPH_SHIFT) +#define CRYP_CR_GCM_CMPH_FINAL (3 << CRYP_CR_GCM_CMPH_SHIFT) + +/* ALGOMODE3: Algorithm mode, fourth bit */ +#define CRYP_CR_ALGOMODE3 (1 << 19) + +/**@}*/ + +/** @defgroup crypto_api API (for F42xx or F43xx only) + * + * @brief API for the CRYP controller. + * + * @warning Only for F42xx and 43xx + * + * @ingroup crypto_defines + */ +/**@{*/ + +typedef enum { + ENCRYPT_GCM = CRYP_CR_ALGOMODE_TDES_ECB | CRYP_CR_ALGOMODE3, + ENCRYPT_CCM = CRYP_CR_ALGOMODE_TDES_CBC | CRYP_CR_ALGOMODE3, + DECRYPT_GCM = CRYP_CR_ALGOMODE_TDES_ECB | CRYP_CR_ALGOMODE3 | + CRYP_CR_ALGODIR, + DECRYPT_CCM = CRYP_CR_ALGOMODE_TDES_CBC | CRYP_CR_ALGOMODE3 | + CRYP_CR_ALGODIR, +} crypto_mode_mac_t; + +BEGIN_DECLS + +void crypto_context_swap(uint32_t * buf); +void crypto_set_mac_algorithm(crypto_mode_mac_t mode); + +END_DECLS +/**@}*/ +/**@}*/ +#endif diff --git a/include/libopencm3/stm32/f4/memorymap.h b/include/libopencm3/stm32/f4/memorymap.h index 01728df5..5b1e6dbc 100644 --- a/include/libopencm3/stm32/f4/memorymap.h +++ b/include/libopencm3/stm32/f4/memorymap.h @@ -116,11 +116,14 @@ /* PERIPH_BASE_AHB1 + 0x60000 (0x4008 0000 - 0x4FFF FFFF): Reserved */ /* AHB2 */ -#define USB_OTG_FS_BASE (PERIPH_BASE_AHB2 + 0x0000) +#define USB_OTG_FS_BASE (PERIPH_BASE_AHB2 + 0x00000) /* PERIPH_BASE_AHB2 + 0x40000 (0x5004 0000 - 0x5004 FFFF): Reserved */ -#define DCMI_BASE (PERIPH_BASE_AHB2 + 0x50000) -/* PERIPH_BASE_AHB2 + 0x50400 (0x5005 0400 - 0x5006 07FF): Reserved */ -#define RNG_BASE (PERIPH_BASE_AHB2 + 0x60800) +#define DCMI_BASE (PERIPH_BASE_AHB2 + 0x50000) +/* PERIPH_BASE_AHB2 + 0x50400 (0x5005 0400 - 0x5005 FFFF): Reserved */ +#define CRYP_BASE (PERIPH_BASE_AHB2 + 0x60000) +#define HASH_BASE (PERIPH_BASE_AHB2 + 0x60400) +/* PERIPH_BASE_AHB2 + 0x60C00 (0x5006 0C00 - 0x5006 07FF): Reserved */ +#define RNG_BASE (PERIPH_BASE_AHB2 + 0x60800) /* PERIPH_BASE_AHB2 + 0x61000 (0x5006 1000 - 0x5FFF FFFF): Reserved */ /* AHB3 */ diff --git a/lib/stm32/common/crypto_common_f24.c b/lib/stm32/common/crypto_common_f24.c new file mode 100644 index 00000000..01ec3c40 --- /dev/null +++ b/lib/stm32/common/crypto_common_f24.c @@ -0,0 +1,175 @@ +/** @addtogroup crypto_file + * + * @brief libopencm3 STM32 Cryptographic controller + * + * @version 1.0.0 + * + * @date 17 Jun 2013 + * + * This library supports the cryptographic coprocessor system for the + * STM32 series of ARM Cortex Microcontrollers + * + * LGPL License Terms @ref lgpl_license + */ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Stephen Caudle + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/**@{*/ + +#include + +#define CRYP_CR_ALGOMODE_MASK ((1 << 19) | CRYP_CR_ALGOMODE) + +/** + * @brief Wait, if the Controller is busy + */ +void crypto_wait_busy(void) +{ + while (CRYP_SR & CRYP_SR_BUSY) ; +} + +/** + * @brief Set key value to the controller + * @param[in] keysize crypto_keysize_t Specified size of the key. + * @param[in] key uint64_t[] Key value (array of 4 items) + */ +void crypto_set_key(crypto_keysize_t keysize, uint64_t key[]) +{ + int i; + + crypto_wait_busy(); + + CRYP_CR = (CRYP_CR & ~CRYP_CR_KEYSIZE) | + (keysize << CRYP_CR_KEYSIZE_SHIFT); + + for (i = 0; i < 4; i++) { + CRYP_KR(i) = key[i]; + } +} + +/** + * @brief Set Initialization Vector + * + * @param[in] iv uint64_t[] Initialization vector (array of 4 items) + + * @note Cryptographic controller must be in disabled state + */ +void crypto_set_iv(uint64_t iv[]) +{ + int i; + + crypto_wait_busy(); + + for (i = 0; i < 4; i++) { + CRYP_IVR(i) = iv[i]; + } +} + +/** + * @brief Set the order of the data to be crypted + * + * @param[in] datatype crypto_datatype_t Specified datatype of the key. + */ +void crypto_set_datatype(crypto_datatype_t datatype) +{ + CRYP_CR = (CRYP_CR & ~CRYP_CR_DATATYPE) | + (datatype << CRYP_CR_DATATYPE_SHIFT); +} + +/** + * @brief Set the algoritm for Encryption/decryption + * + *@param[in] mode crypto_mode_t Mode of execution + */ +void crypto_set_algorithm(crypto_mode_t mode) +{ + mode &= ~CRYP_CR_ALGOMODE_MASK; + + if ((mode == DECRYPT_AES_ECB) || (mode == DECRYPT_AES_CBC)) { + /* Unroll keys for the AES encoder for the user automatically */ + + CRYP_CR = (CRYP_CR & ~CRYP_CR_ALGOMODE_MASK) | + CRYP_CR_ALGOMODE_AES_PREP; + + crypto_start(); + crypto_wait_busy(); + /* module switches to DISABLE automatically */ + } + /* set algo mode */ + CRYP_CR = (CRYP_CR & ~CRYP_CR_ALGOMODE_MASK) | mode; + + /* flush buffers */ + CRYP_CR |= CRYP_CR_FFLUSH; +} + +/** + * @brief Enable the cryptographic controller and start processing + */ +void crypto_start(void) +{ + CRYP_CR |= CRYP_CR_CRYPEN; +} + +/** + * @brief Disable the cryptographic controller and stop processing + */ + +void crypto_stop(void) +{ + CRYP_CR &= ~CRYP_CR_CRYPEN; +} + +/** + * @brief Start of encryption or decryption on data buffers + * + * This blocking method transfers input buffer of specified length to the + * cryptographic coprocessor, and instructs him to begin of ciphering or + * deciphering. It waits for data to be ready, and then fills the processed + * data to output buffer. + * + * @param[in] inp uint32_t* Input array to crypt/decrypt. + * @param[in] outp uint32_t* Output array with crypted/encrypted data. + * @param[in] length uint32_t Length of the arrays + * + * @returns uint32_t Number of written words + */ +uint32_t crypto_process_block(uint32_t * inp, uint32_t * outp, uint32_t length) +{ + uint32_t rd = 0, wr = 0; + + /* Transfer the data */ + while (rd != length) { + if ((wr < length) && (CRYP_SR & CRYP_SR_IFNF)) { + CRYP_DIN = *inp++; + wr++; + } + + if (CRYP_SR & CRYP_SR_OFNE) { + *outp++ = CRYP_DOUT; + rd++; + } + } + + /* Wait to finish - Not needed ? */ + crypto_wait_busy(); + + return wr; +} + +/**@}*/ diff --git a/lib/stm32/f2/Makefile b/lib/stm32/f2/Makefile index 18107c5e..cc34d658 100644 --- a/lib/stm32/f2/Makefile +++ b/lib/stm32/f2/Makefile @@ -39,7 +39,7 @@ OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \ gpio_common_all.o gpio_common_f24.o i2c_common_all.o \ iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \ timer_common_all.o timer_common_f24.o usart_common_all.o \ - flash_common_f24.o hash_common_f24.o + flash_common_f24.o hash_common_f24.o crypto_common_f24.o VPATH += ../../usb:../:../../cm3:../common diff --git a/lib/stm32/f4/Makefile b/lib/stm32/f4/Makefile index b8ef2e76..81753adf 100644 --- a/lib/stm32/f4/Makefile +++ b/lib/stm32/f4/Makefile @@ -34,13 +34,14 @@ CFLAGS = -Os -g \ # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = adc.o can.o gpio.o exti2.o pwr.o rcc.o rtc.o +OBJS = adc.o can.o gpio.o exti2.o pwr.o rcc.o rtc.o crypto.o OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \ gpio_common_all.o gpio_common_f24.o i2c_common_all.o \ iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \ spi_common_all.o timer_common_all.o timer_common_f24.o \ - usart_common_all.o flash_common_f24.o hash_common_f24.o + usart_common_all.o flash_common_f24.o hash_common_f24.o \ + crypto_common_f24.o OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \ usb_f107.o usb_f207.o diff --git a/lib/stm32/f4/crypto.c b/lib/stm32/f4/crypto.c new file mode 100644 index 00000000..050500ab --- /dev/null +++ b/lib/stm32/f4/crypto.c @@ -0,0 +1,66 @@ +/** @defgroup crypto_file CRYPTO + * + * @ingroup STM32F4xx + * + * @brief libopencm3 STM32F4xx CRYPTO + * + * @version 1.0.0 + * + * @date 18 Jun 2013 + * + */ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Stephen Caudle + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include + +/**@{*/ + +/*---------------------------------------------------------------------------*/ + +/** @brief Set the MAC algorithm + */ +void crypto_set_mac_algorithm(crypto_mode_mac_t mode) +{ + crypto_set_algorithm((crypto_mode_t) mode); +} + +/** + * @brief Swap context + * + *@param[in] buf uint32_t Memory space for swap (16 items length) + */ +void crypto_context_swap(uint32_t * buf) +{ + int i; + /* Apply exact order of ? */ + for (i = 0; i < 8; i++) { + uint32_t save = *buf; + *buf++ = CRYP_CSGCMCCMR(i); + CRYP_CSGCMCCMR(i) = save; + }; + + for (i = 0; i < 8; i++) { + uint32_t save = *buf; + *buf++ = CRYP_CSGCMR(i); + CRYP_CSGCMCCMR(i) = save; + }; +} + +/**@}*/