EMTime/libopencm3-examples
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Updated to use the new rcc_periph_clock_enable code

Browse Source
This commit is contained in:
cmcmanis
2014-02-20 20:09:02 -08:00
committed by Piotr Esden-Tempski
parent ae9c116e30
commit e4d106dce6
11 changed files with 32 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
examples/stm32/f4/stm32f4-disco/spi/console.c
View File

@@ -191,7 +191,7 @@ int console_gets(char *s, int len) {
void console_setup(int baud) {
/* MUST enable the GPIO clock in ADDITION to the USART clock */
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN);
rcc_periph_clock_enable(RCC_GPIOD);
/* This example uses PD5 and PD6 for Tx and Rx respectively
* but other pins are available for this role on USART2 (our chosen
@@ -213,7 +213,7 @@ void console_setup(int baud) {
* attach to different buses, and even some UARTS are attached to
* APB1 and some to APB2, again the data sheet is useful here.
*/
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
rcc_periph_clock_enable(RCC_USART2);
/* Set up USART/UART parameters using the libopencm3 helper functions */
usart_set_baudrate(CONSOLE_UART, baud);

5
examples/stm32/f4/stm32f4-disco/spi/spi-mems.c
View File

@@ -225,8 +225,7 @@ int main(void) {
console_setup(115200);
/* Enable the GPIO ports whose pins we are using */
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPFEN);
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN);
rcc_periph_clock_enable(RCC_GPIOF | RCC_GPIOC);
gpio_mode_setup(GPIOF, GPIO_MODE_AF, GPIO_PUPD_PULLDOWN,
GPIO7 | GPIO8 | GPIO9);
@@ -238,7 +237,7 @@ int main(void) {
gpio_set(GPIOC, GPIO1);
gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO1);
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_SPI5EN);
rcc_periph_clock_enable(RCC_SPI5);
cr_tmp = SPI_CR1_BAUDRATE_FPCLK_DIV_8 |\
SPI_CR1_MSTR |\