Updated to the new locm3 changed to stdint types.
This commit is contained in:
@@ -94,10 +94,10 @@ static void adc_setup(void)
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while ((ADC_CR2(ADC1) & ADC_CR2_CAL) != 0); //added this check
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}
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static void my_usart_print_int(u32 usart, int value)
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static void my_usart_print_int(uint32_t usart, int value)
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{
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s8 i;
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u8 nr_digits = 0;
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int8_t i;
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uint8_t nr_digits = 0;
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char buffer[25];
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if (value < 0) {
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@@ -119,8 +119,8 @@ static void my_usart_print_int(u32 usart, int value)
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int main(void)
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{
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u8 channel_array[16];
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u16 temperature = 0;
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uint8_t channel_array[16];
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uint16_t temperature = 0;
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rcc_clock_setup_in_hse_12mhz_out_72mhz();
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gpio_setup();
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@@ -120,10 +120,10 @@ static void adc_setup(void)
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while ((ADC_CR2(ADC1) & ADC_CR2_CAL) != 0);
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}
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static void my_usart_print_int(u32 usart, int value)
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static void my_usart_print_int(uint32_t usart, int value)
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{
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s8 i;
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u8 nr_digits = 0;
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int8_t i;
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uint8_t nr_digits = 0;
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char buffer[25];
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if (value < 0) {
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@@ -145,8 +145,8 @@ static void my_usart_print_int(u32 usart, int value)
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int main(void)
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{
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u8 channel_array[16];
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u16 temperature = 0;
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uint8_t channel_array[16];
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uint16_t temperature = 0;
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rcc_clock_setup_in_hse_12mhz_out_72mhz();
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gpio_setup();
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@@ -27,7 +27,7 @@
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/cm3/nvic.h>
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volatile u16 temperature = 0;
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volatile uint16_t temperature = 0;
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static void usart_setup(void)
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{
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@@ -132,10 +132,10 @@ static void adc_setup(void)
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while ((ADC_CR2(ADC1) & ADC_CR2_CAL) != 0);
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}
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static void my_usart_print_int(u32 usart, int value)
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static void my_usart_print_int(uint32_t usart, int value)
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{
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s8 i;
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u8 nr_digits = 0;
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int8_t i;
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uint8_t nr_digits = 0;
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char buffer[25];
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if (value < 0) {
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@@ -157,7 +157,7 @@ static void my_usart_print_int(u32 usart, int value)
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int main(void)
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{
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u8 channel_array[16];
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uint8_t channel_array[16];
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rcc_clock_setup_in_hse_12mhz_out_72mhz();
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gpio_setup();
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@@ -27,11 +27,11 @@
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#include <libopencm3/stm32/timer.h>
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#include <libopencm3/cm3/nvic.h>
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volatile u16 temperature = 0;
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volatile u16 v_refint = 0;
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volatile u16 lisam_adc1 = 0;
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volatile u16 lisam_adc2 = 0;
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u8 channel_array[4]; /* for injected sampling, 4 channels max, for regular, 16 max */
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volatile uint16_t temperature = 0;
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volatile uint16_t v_refint = 0;
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volatile uint16_t lisam_adc1 = 0;
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volatile uint16_t lisam_adc2 = 0;
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uint8_t channel_array[4]; /* for injected sampling, 4 channels max, for regular, 16 max */
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static void usart_setup(void)
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{
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@@ -149,10 +149,10 @@ static void adc_setup(void)
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while ((ADC_CR2(ADC1) & ADC_CR2_CAL) != 0); //added this check
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}
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static void my_usart_print_int(u32 usart, int value)
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static void my_usart_print_int(uint32_t usart, int value)
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{
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s8 i;
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u8 nr_digits = 0;
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int8_t i;
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uint8_t nr_digits = 0;
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char buffer[25];
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if (value < 0) {
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@@ -88,10 +88,10 @@ static void adc_setup(void)
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adc_calibration(ADC1);
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}
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static void my_usart_print_int(u32 usart, int value)
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static void my_usart_print_int(uint32_t usart, int value)
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{
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s8 i;
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u8 nr_digits = 0;
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int8_t i;
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uint8_t nr_digits = 0;
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char buffer[25];
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if (value < 0) {
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@@ -113,8 +113,8 @@ static void my_usart_print_int(u32 usart, int value)
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int main(void)
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{
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u8 channel_array[16];
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u16 temperature = 0;
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uint8_t channel_array[16];
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uint16_t temperature = 0;
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rcc_clock_setup_in_hse_12mhz_out_72mhz();
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gpio_setup();
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@@ -26,22 +26,22 @@
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#include <libopencm3/stm32/can.h>
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struct can_tx_msg {
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u32 std_id;
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u32 ext_id;
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u8 ide;
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u8 rtr;
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u8 dlc;
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u8 data[8];
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uint32_t std_id;
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uint32_t ext_id;
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uint8_t ide;
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uint8_t rtr;
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uint8_t dlc;
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uint8_t data[8];
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};
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struct can_rx_msg {
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u32 std_id;
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u32 ext_id;
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u8 ide;
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u8 rtr;
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u8 dlc;
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u8 data[8];
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u8 fmi;
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uint32_t std_id;
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uint32_t ext_id;
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uint8_t ide;
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uint8_t rtr;
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uint8_t dlc;
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uint8_t data[8];
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uint8_t fmi;
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};
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struct can_tx_msg can_tx_msg;
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@@ -166,7 +166,7 @@ static void can_setup(void)
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void sys_tick_handler(void)
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{
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static int temp32 = 0;
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static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0};
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static uint8_t data[8] = {0, 1, 2, 0, 0, 0, 0, 0};
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/* We call this handler every 1ms so every 100ms = 0.1s
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* resulting in 100Hz message rate.
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@@ -195,9 +195,9 @@ void sys_tick_handler(void)
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void usb_lp_can_rx0_isr(void)
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{
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u32 id, fmi;
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uint32_t id, fmi;
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bool ext, rtr;
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u8 length, data[8];
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uint8_t length, data[8];
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can_receive(CAN1, 0, false, &id, &ext, &rtr, &fmi, &length, data);
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@@ -132,7 +132,7 @@ static void gpio_setup(void)
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int main(void)
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{
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int counter = 0;
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u16 rx_value = 0x42;
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uint16_t rx_value = 0x42;
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clock_setup();
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gpio_setup();
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@@ -142,9 +142,9 @@ static void dma_setup(void)
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}
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#if USE_16BIT_TRANSFERS
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static int spi_dma_transceive(u16 *tx_buf, int tx_len, u16 *rx_buf, int rx_len)
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static int spi_dma_transceive(uint16_t *tx_buf, int tx_len, uint16_t *rx_buf, int rx_len)
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#else
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static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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static int spi_dma_transceive(uint8_t *tx_buf, int tx_len, uint8_t *rx_buf, int rx_len)
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#endif
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{
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/* Check for 0 length in both tx and rx */
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@@ -162,7 +162,7 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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* busy any longer, i.e. the last activity was verified
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* complete elsewhere in the program.
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*/
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volatile u8 temp_data __attribute__ ((unused));
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volatile uint8_t temp_data __attribute__ ((unused));
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while (SPI_SR(SPI1) & (SPI_SR_RXNE | SPI_SR_OVR)) {
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temp_data = SPI_DR(SPI1);
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}
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@@ -178,8 +178,8 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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/* Set up rx dma, note it has higher priority to avoid overrun */
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if (rx_len > 0) {
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dma_set_peripheral_address(DMA1, DMA_CHANNEL2, (u32)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL2, (u32)rx_buf);
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dma_set_peripheral_address(DMA1, DMA_CHANNEL2, (uint32_t)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL2, (uint32_t)rx_buf);
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dma_set_number_of_data(DMA1, DMA_CHANNEL2, rx_len);
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dma_set_read_from_peripheral(DMA1, DMA_CHANNEL2);
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dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL2);
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@@ -195,8 +195,8 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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/* Set up tx dma */
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if (tx_len > 0) {
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (u32)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (u32)tx_buf);
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (uint32_t)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (uint32_t)tx_buf);
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dma_set_number_of_data(DMA1, DMA_CHANNEL3, tx_len);
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dma_set_read_from_memory(DMA1, DMA_CHANNEL3);
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dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL3);
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@@ -340,11 +340,11 @@ int main(void)
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/* Transmit and Receive packets, set transmit to index and receive to known unused value to aid in debugging */
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#if USE_16BIT_TRANSFERS
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u16 tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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u16 rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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uint16_t tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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uint16_t rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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#else
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u8 tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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u8 rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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uint8_t tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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uint8_t rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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#endif
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transceive_status = DONE;
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@@ -52,9 +52,9 @@ volatile trans_status transceive_status;
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int rx_buf_remainder = 0;
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#if USE_16BIT_TRANSFERS
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u16 dummy_tx_buf = 0xdd;
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uint16_t dummy_tx_buf = 0xdd;
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#else
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u8 dummy_tx_buf = 0xdd;
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uint8_t dummy_tx_buf = 0xdd;
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#endif
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int _write(int file, char *ptr, int len);
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@@ -152,9 +152,9 @@ static void dma_setup(void)
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}
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#if USE_16BIT_TRANSFERS
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static int spi_dma_transceive(u16 *tx_buf, int tx_len, u16 *rx_buf, int rx_len)
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static int spi_dma_transceive(uint16_t *tx_buf, int tx_len, uint16_t *rx_buf, int rx_len)
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#else
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static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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static int spi_dma_transceive(uint8_t *tx_buf, int tx_len, uint8_t *rx_buf, int rx_len)
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#endif
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{
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@@ -173,7 +173,7 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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* busy any longer, i.e. the last activity was verified
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* complete elsewhere in the program.
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*/
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volatile u8 temp_data __attribute__ ((unused));
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volatile uint8_t temp_data __attribute__ ((unused));
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while (SPI_SR(SPI1) & (SPI_SR_RXNE | SPI_SR_OVR)) {
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temp_data = SPI_DR(SPI1);
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}
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@@ -199,8 +199,8 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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/* Set up rx dma, note it has higher priority to avoid overrun */
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if (rx_len > 0) {
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dma_set_peripheral_address(DMA1, DMA_CHANNEL2, (u32)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL2, (u32)rx_buf);
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dma_set_peripheral_address(DMA1, DMA_CHANNEL2, (uint32_t)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL2, (uint32_t)rx_buf);
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dma_set_number_of_data(DMA1, DMA_CHANNEL2, rx_len);
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dma_set_read_from_peripheral(DMA1, DMA_CHANNEL2);
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dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL2);
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@@ -217,8 +217,8 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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/* Set up tx dma (must always run tx to get clock signal) */
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if (tx_len > 0) {
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/* Here we have a regular tx transfer */
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (u32)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (u32)tx_buf);
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (uint32_t)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (uint32_t)tx_buf);
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dma_set_number_of_data(DMA1, DMA_CHANNEL3, tx_len);
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dma_set_read_from_memory(DMA1, DMA_CHANNEL3);
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dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL3);
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@@ -235,8 +235,8 @@ static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
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* and set the length to the rx_len to get all rx data in, while
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* not incrementing the memory pointer
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*/
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (u32)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (u32)(&dummy_tx_buf)); // Change here
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (uint32_t)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (uint32_t)(&dummy_tx_buf)); // Change here
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dma_set_number_of_data(DMA1, DMA_CHANNEL3, rx_len); // Change here
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dma_set_read_from_memory(DMA1, DMA_CHANNEL3);
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dma_disable_memory_increment_mode(DMA1, DMA_CHANNEL3); // Change here
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@@ -313,8 +313,8 @@ void dma1_channel3_isr(void)
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*/
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if (rx_buf_remainder > 0) {
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dma_channel_reset(DMA1, DMA_CHANNEL3);
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (u32)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (u32)(&dummy_tx_buf)); // Change here
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dma_set_peripheral_address(DMA1, DMA_CHANNEL3, (uint32_t)&SPI1_DR);
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dma_set_memory_address(DMA1, DMA_CHANNEL3, (uint32_t)(&dummy_tx_buf)); // Change here
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dma_set_number_of_data(DMA1, DMA_CHANNEL3, rx_buf_remainder); // Change here
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dma_set_read_from_memory(DMA1, DMA_CHANNEL3);
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dma_disable_memory_increment_mode(DMA1, DMA_CHANNEL3); // Change here
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@@ -401,11 +401,11 @@ int main(void)
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/* Transmit and Receive packets, set transmit to index and receive to known unused value to aid in debugging */
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#if USE_16BIT_TRANSFERS
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u16 tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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u16 rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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uint16_t tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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uint16_t rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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#else
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u8 tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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u8 rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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uint8_t tx_packet[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15};
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uint8_t rx_packet[16] = {0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42};
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#endif
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transceive_status = DONE;
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@@ -494,9 +494,9 @@ int main(void)
|
||||
/* Reset receive buffer for consistency */
|
||||
for (i = 0; i < 16; i++) {
|
||||
#if USE_16BIT_TRANSFERS
|
||||
tx_packet[i] = (u16)i;
|
||||
tx_packet[i] = (uint16_t)i;
|
||||
#else
|
||||
tx_packet[i] = (u8)i;
|
||||
tx_packet[i] = (uint8_t)i;
|
||||
#endif
|
||||
rx_packet[i] = 0x42;
|
||||
}
|
||||
|
||||
@@ -76,8 +76,8 @@ static void dma_write(char *data, int size)
|
||||
/* Reset DMA channel*/
|
||||
dma_channel_reset(DMA1, DMA_CHANNEL7);
|
||||
|
||||
dma_set_peripheral_address(DMA1, DMA_CHANNEL7, (u32)&USART2_DR);
|
||||
dma_set_memory_address(DMA1, DMA_CHANNEL7, (u32)data);
|
||||
dma_set_peripheral_address(DMA1, DMA_CHANNEL7, (uint32_t)&USART2_DR);
|
||||
dma_set_memory_address(DMA1, DMA_CHANNEL7, (uint32_t)data);
|
||||
dma_set_number_of_data(DMA1, DMA_CHANNEL7, size);
|
||||
dma_set_read_from_memory(DMA1, DMA_CHANNEL7);
|
||||
dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL7);
|
||||
@@ -118,8 +118,8 @@ static void dma_read(char *data, int size)
|
||||
/* Reset DMA channel*/
|
||||
dma_channel_reset(DMA1, DMA_CHANNEL6);
|
||||
|
||||
dma_set_peripheral_address(DMA1, DMA_CHANNEL6, (u32)&USART2_DR);
|
||||
dma_set_memory_address(DMA1, DMA_CHANNEL6, (u32)data);
|
||||
dma_set_peripheral_address(DMA1, DMA_CHANNEL6, (uint32_t)&USART2_DR);
|
||||
dma_set_memory_address(DMA1, DMA_CHANNEL6, (uint32_t)data);
|
||||
dma_set_number_of_data(DMA1, DMA_CHANNEL6, size);
|
||||
dma_set_read_from_peripheral(DMA1, DMA_CHANNEL6);
|
||||
dma_enable_memory_increment_mode(DMA1, DMA_CHANNEL6);
|
||||
|
||||
@@ -81,7 +81,7 @@ static void gpio_setup(void)
|
||||
|
||||
void usart2_isr(void)
|
||||
{
|
||||
static u8 data = 'A';
|
||||
static uint8_t data = 'A';
|
||||
|
||||
/* Check if we were called because of RXNE. */
|
||||
if (((USART_CR1(USART2) & USART_CR1_RXNEIE) != 0) &&
|
||||
|
||||
@@ -32,13 +32,13 @@
|
||||
* https://github.com/open-bldc/open-bldc/tree/master/source/libgovernor
|
||||
*****************************************************************************/
|
||||
|
||||
typedef s32 ring_size_t;
|
||||
typedef int32_t ring_size_t;
|
||||
|
||||
struct ring {
|
||||
u8 *data;
|
||||
uint8_t *data;
|
||||
ring_size_t size;
|
||||
u32 begin;
|
||||
u32 end;
|
||||
uint32_t begin;
|
||||
uint32_t end;
|
||||
};
|
||||
|
||||
#define RING_SIZE(RING) ((RING)->size - 1)
|
||||
@@ -47,7 +47,7 @@ struct ring {
|
||||
|
||||
int _write(int file, char *ptr, int len);
|
||||
|
||||
static void ring_init(struct ring *ring, u8 *buf, ring_size_t size)
|
||||
static void ring_init(struct ring *ring, uint8_t *buf, ring_size_t size)
|
||||
{
|
||||
ring->data = buf;
|
||||
ring->size = size;
|
||||
@@ -55,20 +55,20 @@ static void ring_init(struct ring *ring, u8 *buf, ring_size_t size)
|
||||
ring->end = 0;
|
||||
}
|
||||
|
||||
static s32 ring_write_ch(struct ring *ring, u8 ch)
|
||||
static int32_t ring_write_ch(struct ring *ring, uint8_t ch)
|
||||
{
|
||||
if (((ring->end + 1) % ring->size) != ring->begin) {
|
||||
ring->data[ring->end++] = ch;
|
||||
ring->end %= ring->size;
|
||||
return (u32)ch;
|
||||
return (uint32_t)ch;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static s32 ring_write(struct ring *ring, u8 *data, ring_size_t size)
|
||||
static int32_t ring_write(struct ring *ring, uint8_t *data, ring_size_t size)
|
||||
{
|
||||
s32 i;
|
||||
int32_t i;
|
||||
|
||||
for (i = 0; i < size; i++) {
|
||||
if (ring_write_ch(ring, data[i]) < 0)
|
||||
@@ -78,9 +78,9 @@ static s32 ring_write(struct ring *ring, u8 *data, ring_size_t size)
|
||||
return i;
|
||||
}
|
||||
|
||||
static s32 ring_read_ch(struct ring *ring, u8 *ch)
|
||||
static int32_t ring_read_ch(struct ring *ring, uint8_t *ch)
|
||||
{
|
||||
s32 ret = -1;
|
||||
int32_t ret = -1;
|
||||
|
||||
if (ring->begin != ring->end) {
|
||||
ret = ring->data[ring->begin++];
|
||||
@@ -93,9 +93,9 @@ static s32 ring_read_ch(struct ring *ring, u8 *ch)
|
||||
}
|
||||
|
||||
/* Not used!
|
||||
static s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
|
||||
static int32_t ring_read(struct ring *ring, uint8_t *data, ring_size_t size)
|
||||
{
|
||||
s32 i;
|
||||
int32_t i;
|
||||
|
||||
for (i = 0; i < size; i++) {
|
||||
if (ring_read_ch(ring, data + i) < 0)
|
||||
@@ -113,7 +113,7 @@ static s32 ring_read(struct ring *ring, u8 *data, ring_size_t size)
|
||||
#define BUFFER_SIZE 1024
|
||||
|
||||
struct ring output_ring;
|
||||
u8 output_ring_buffer[BUFFER_SIZE];
|
||||
uint8_t output_ring_buffer[BUFFER_SIZE];
|
||||
|
||||
static void clock_setup(void)
|
||||
{
|
||||
@@ -188,7 +188,7 @@ void usart2_isr(void)
|
||||
if (((USART_CR1(USART2) & USART_CR1_TXEIE) != 0) &&
|
||||
((USART_SR(USART2) & USART_SR_TXE) != 0)) {
|
||||
|
||||
s32 data;
|
||||
int32_t data;
|
||||
|
||||
data = ring_read_ch(&output_ring, NULL);
|
||||
|
||||
@@ -207,7 +207,7 @@ int _write(int file, char *ptr, int len)
|
||||
int ret;
|
||||
|
||||
if (file == 1) {
|
||||
ret = ring_write(&output_ring, (u8 *)ptr, len);
|
||||
ret = ring_write(&output_ring, (uint8_t *)ptr, len);
|
||||
|
||||
if (ret < 0)
|
||||
ret = -ret;
|
||||
@@ -241,7 +241,7 @@ void sys_tick_handler(void)
|
||||
static int counter = 0;
|
||||
static float fcounter = 0.0;
|
||||
static double dcounter = 0.0;
|
||||
static u32 temp32 = 0;
|
||||
static uint32_t temp32 = 0;
|
||||
|
||||
temp32++;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user