lm4f: Update examples to the new GPIO API

We updated the GPIO API to use the AHB bus; however the AHP aperture for
GPIO ports A through J needs to be explicitly enabled at runtime. Accessing
the AHB aperture otherwise hardfaults.

To make the examples work again, we call gpio_enable_ahb_aperture() at the
start of main().

Since we're at it, we also take out the ugly register accesses in favor
of the new gpio functions.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Alexandru Gagniuc
2013-05-17 19:55:08 -05:00
parent 3758ce779f
commit adddf9e418
3 changed files with 22 additions and 39 deletions

View File

@@ -95,8 +95,8 @@ static void gpio_setup(void)
periph_clock_enable(RCC_GPIOF); periph_clock_enable(RCC_GPIOF);
const u32 outpins = (LED_R | LED_G | LED_B); const u32 outpins = (LED_R | LED_G | LED_B);
GPIO_DIR(RGB_PORT) |= outpins; /* Configure outputs. */ gpio_mode_setup(RGB_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, outpins);
GPIO_DEN(RGB_PORT) |= outpins; /* Enable digital function on outputs. */ gpio_set_output_config(RGB_PORT, GPIO_OTYPE_PP, GPIO_DRIVE_2MA, outpins);
/* /*
* Now take care of our buttons * Now take care of our buttons
@@ -104,20 +104,12 @@ static void gpio_setup(void)
const u32 btnpins = USR_SW1 | USR_SW2; const u32 btnpins = USR_SW1 | USR_SW2;
/* /*
* PF0 is locked by default. We need to unlock the GPIO_CR register, * PF0 is a locked by default. We need to unlock it before we can
* then enable PF0 commit. After we do this, we can setup PF0. If we * re-purpose it as a GPIO pin.
* don't do this, any configuration done to PF0 is lost, and we will not
* have a PF0 interrupt.
*/ */
GPIO_LOCK(GPIOF) = 0x4C4F434B; gpio_unlock_commit(GPIOF, USR_SW2);
GPIO_CR(GPIOF) |= USR_SW2; /* Configure pins as inputs, with pull-up. */
gpio_mode_setup(GPIOF, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, btnpins);
/* Configure pins as inputs. */
GPIO_DIR(GPIOF) &= ~btnpins;
/* Enable digital function on the pins. */
GPIO_DEN(GPIOF) |= btnpins;
/* Pull-up the pins. We don't have an external pull-up */
GPIO_PUR(GPIOF) |= btnpins;
} }
/* /*
@@ -127,14 +119,10 @@ static void gpio_setup(void)
static void irq_setup(void) static void irq_setup(void)
{ {
const u32 btnpins = USR_SW1 | USR_SW2; const u32 btnpins = USR_SW1 | USR_SW2;
/* Configure interrupt as edge-sensitive */
GPIO_IS(GPIOF) &= ~btnpins;
/* Interrupt only respond to rising or falling edge (single-edge) */
GPIO_IBE(GPIOF) &= ~btnpins;
/* Trigger interrupt on rising-edge (when button is depressed) */ /* Trigger interrupt on rising-edge (when button is depressed) */
GPIO_IEV(GPIOF) |= btnpins; gpio_configure_trigger(GPIOF, GPIO_TRIG_EDGE_RISE, btnpins);
/* Finally, Enable interrupt */ /* Finally, Enable interrupt */
GPIO_IM(GPIOF) |= btnpins; gpio_enable_interrupts(GPIOF, btnpins);
/* Enable the interrupt in the NVIC as well */ /* Enable the interrupt in the NVIC as well */
nvic_enable_irq(NVIC_GPIOF_IRQ); nvic_enable_irq(NVIC_GPIOF_IRQ);
} }
@@ -149,6 +137,7 @@ static void delay(void)
int main(void) int main(void)
{ {
gpio_enable_ahb_aperture();
clock_setup(); clock_setup();
gpio_setup(); gpio_setup();
irq_setup(); irq_setup();
@@ -185,7 +174,7 @@ int main(void)
void gpiof_isr(void) void gpiof_isr(void)
{ {
if (GPIO_RIS(GPIOF) & USR_SW1) { if (gpio_is_interrupt_source(GPIOF, USR_SW1)) {
/* SW1 was just depressed */ /* SW1 was just depressed */
bypass = !bypass; bypass = !bypass;
if (bypass) { if (bypass) {
@@ -201,10 +190,10 @@ void gpiof_isr(void)
rcc_change_pll_divisor(plldiv[ipll]); rcc_change_pll_divisor(plldiv[ipll]);
} }
/* Clear interrupt source */ /* Clear interrupt source */
GPIO_ICR(GPIOF) = USR_SW1; gpio_clear_interrupt_flag(GPIOF, USR_SW1);
} }
if (GPIO_RIS(GPIOF) & USR_SW2) { if (gpio_is_interrupt_source(GPIOF, USR_SW2)) {
/* SW2 was just depressed */ /* SW2 was just depressed */
if (!bypass) { if (!bypass) {
if (plldiv[++ipll] == 0) if (plldiv[++ipll] == 0)
@@ -212,6 +201,6 @@ void gpiof_isr(void)
rcc_change_pll_divisor(plldiv[ipll]); rcc_change_pll_divisor(plldiv[ipll]);
} }
/* Clear interrupt source */ /* Clear interrupt source */
GPIO_ICR(GPIOF) = USR_SW2; gpio_clear_interrupt_flag(GPIOF, USR_SW2);
} }
} }

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@@ -25,14 +25,10 @@
static void uart_setup(void) static void uart_setup(void)
{ {
u32 pins;
/* Enable GPIOA in run mode. */ /* Enable GPIOA in run mode. */
periph_clock_enable(RCC_GPIOA); periph_clock_enable(RCC_GPIOA);
/* Configure PA0 and PA1 as alternate function pins */ /* Mux PA0 and PA1 to UART0 (alternate function 1) */
pins = GPIO0 | GPIO1; gpio_set_af(GPIOA, 1, GPIO0 | GPIO1);
GPIO_AFSEL(GPIOA) |= pins;
GPIO_DEN(GPIOA) |= pins;
/* PA0 and PA1 are muxed to UART0 during power on, by default */
/* Enable the UART clock */ /* Enable the UART clock */
periph_clock_enable(RCC_UART0); periph_clock_enable(RCC_UART0);
@@ -79,6 +75,7 @@ void uart0_isr(void)
int main(void) int main(void)
{ {
gpio_enable_ahb_aperture();
uart_setup(); uart_setup();
uart_irq_setup(); uart_irq_setup();

View File

@@ -24,14 +24,10 @@
static void uart_setup(void) static void uart_setup(void)
{ {
u32 pins;
/* Enable GPIOA in run mode. */ /* Enable GPIOA in run mode. */
periph_clock_enable(RCC_GPIOA); periph_clock_enable(RCC_GPIOA);
/* Configure PA0 and PA1 as alternate function pins */ /* Mux PA0 and PA1 to UART0 (alternate function 1) */
pins = GPIO0 | GPIO1; gpio_set_af(GPIOA, 1, GPIO0 | GPIO1);
GPIO_AFSEL(GPIOA) |= pins;
GPIO_DEN(GPIOA) |= pins;
/* PA0 and PA1 are muxed to UART0 during power on, by default */
/* Enable the UART clock */ /* Enable the UART clock */
periph_clock_enable(RCC_UART0); periph_clock_enable(RCC_UART0);
@@ -54,7 +50,8 @@ static void uart_setup(void)
int main(void) int main(void)
{ {
u8 rx; u8 rx;
gpio_enable_ahb_aperture();
uart_setup(); uart_setup();
/* /*