From 4b4115fd72739b1d2b67ea7ded827d102bb9da1a Mon Sep 17 00:00:00 2001 From: Jeff Kent Date: Fri, 18 Dec 2020 13:06:02 -0600 Subject: [PATCH] stm32f429: lcd-dma: Fix LCD clock shift RCC_DCKCFGR was missing a shift for register write --- examples/stm32/f4/stm32f429i-discovery/lcd-dma/lcd-dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/examples/stm32/f4/stm32f429i-discovery/lcd-dma/lcd-dma.c b/examples/stm32/f4/stm32f429i-discovery/lcd-dma/lcd-dma.c index 0b82d08..f3c1977 100644 --- a/examples/stm32/f4/stm32f429i-discovery/lcd-dma/lcd-dma.c +++ b/examples/stm32/f4/stm32f429i-discovery/lcd-dma/lcd-dma.c @@ -164,7 +164,7 @@ static void lcd_dma_init(void) RCC_PLLSAICFGR = (sain << RCC_PLLSAICFGR_PLLSAIN_SHIFT | saiq << RCC_PLLSAICFGR_PLLSAIQ_SHIFT | sair << RCC_PLLSAICFGR_PLLSAIR_SHIFT); - RCC_DCKCFGR |= RCC_DCKCFGR_PLLSAIDIVR_DIVR_8; + RCC_DCKCFGR |= RCC_DCKCFGR_PLLSAIDIVR_DIVR_8 << RCC_DCKCFGR_PLLSAIDIVR_SHIFT; RCC_CR |= RCC_CR_PLLSAION; while ((RCC_CR & RCC_CR_PLLSAIRDY) == 0) { continue;